Re: [PATCH v8 3/3] clk: tenstorrent: Add Atlantis clock controller driver

Brian Masney
2026-03-09T21:17:36Z

On Mon, Mar 09, 2026 at 01:11:02PM -0700, Drew Fustini wrote:
> On Fri, Mar 06, 2026 at 11:12:19AM -0600, Anirudh Srinivasan wrote:
> > Add driver for clock controller in Tenstorrent Atlantis SoC. This version
> > of the driver covers clocks from RCPU subsystem.
> >
> > 5 types of clocks generated by this controller: PLLs (PLLs
> > with bypass functionality and an additional Gate clk at output), Shared
> > Gates (Multiple Gate clks that share an enable bit), standard Muxes,
> > Dividers and Gates. All clocks are implemented using custom clk ops and
> > use the regmap interface associated with the syscon. All clocks are derived
> > from a 24 Mhz oscillator.
> >
> > The reset controller is also setup as an auxiliary device of the clock
> > controller.
> >
> > Signed-off-by: Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com>
> > ---
> > MAINTAINERS | 1 +
> > drivers/clk/Kconfig | 1 +
> > drivers/clk/Makefile | 1 +
> > drivers/clk/tenstorrent/Kconfig | 14 +
> > drivers/clk/tenstorrent/Makefile | 3 +
> > drivers/clk/tenstorrent/atlantis-prcm.c | 870 ++++++++++++++++++++++++++++++++
> > 6 files changed, 890 insertions(+)
>
> Hi Stephen, does it make sense for me to create clk branches [1] in the
> tenstorrent repo on kernel.org for Atlantis patches to go through?

I am not Stephen, but that's the approach that all of the other SoC
vendors use for the clk subsystem, so I would say yes.

Brian