From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0CD2FFCA17D for ; Mon, 9 Mar 2026 20:11:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RpfqVzvhqqOZFlGpIqm/EyF5WldzASwb0sy0/K30xBc=; b=M7sYj5VjVBQ4R/ d0g/wMA5R5xuvSFS69iHMfX4j70BCYQ1oEDypdpJoxVdB9icPZbNz4AVBTz3G/t42hUnC6XG4PjNy ht//v+Jlp6XFHUZHI4xM73RjhyLmwF/spDf6POMPk2M2aycVQByveYQErGc2gaV4bBEP0Ch+fJBeB 1QhpgnDBOFdWkcV+1MyEVgq3/VQuD3bPTYcG5rm4QVE5lEoz6dxbxys2l8/xR3wqocI6EzUdI5Vhb nrw2p3ILFe3AbXLDQURwjRxn/UJ69rmQfWk3koNdNfoHLmJKLrw0w1huDFYeuvk5xVEHGkAOx4W86 eN9+XlvSZeDvL1WTWi5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vzgwV-000000086hX-2bni; Mon, 09 Mar 2026 20:11:07 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vzgwT-000000086hN-3zP4 for linux-riscv@lists.infradead.org; Mon, 09 Mar 2026 20:11:06 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id EF286600B0; Mon, 9 Mar 2026 20:11:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 61A2EC2BC87; Mon, 9 Mar 2026 20:11:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773087064; bh=yF27ep3TepsukCbOCYKesTSmadiqW5lxWjZ7XDNmC/M=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=XVFZwKzB9jRPszDrFhg3z6AwV0gwFcyJ3g2n6z0w+Yf02G1RytIOx+/mGRjRCl4NU kpOTDJocSOHERiAvVdIYIyz4gLj3Gstuxj/Q8bVORzYaJ9OaCdZVyG9l61n7HnSdon djU5LnciJLvVsH2fq2RhZYhKuc9kOBiq2Uu+5b0fAJvyj627dVGpae180F88ZItr6f TFhI6QAKe9oNqeI4uCsgI4a7y0qXDFyJtDvp/aZ49S6yX2KghEJMnb+QgC71VQZxg1 3LvaaTpHBWF2NCNRTGKQ7ez/ARINX4Nne8dS0jvGAv3pJ5QE+3tJ7lio5paaiD8WQA wWO8E7tt62sNQ== Date: Mon, 9 Mar 2026 13:11:02 -0700 From: Drew Fustini To: Stephen Boyd Cc: Anirudh Srinivasan , Drew Fustini , Joel Stanley , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Philipp Zabel , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, joel@jms.id.au, mpe@kernel.org, mpe@oss.tenstorrent.com, npiggin@oss.tenstorrent.com, agross@kernel.org, agross@oss.tenstorrent.com, bmasney@redhat.com, Krzysztof Kozlowski Subject: Re: [PATCH v8 3/3] clk: tenstorrent: Add Atlantis clock controller driver Message-ID: References: <20260306-atlantis-clocks-v8-0-6c9b14a4aa8e@oss.tenstorrent.com> <20260306-atlantis-clocks-v8-3-6c9b14a4aa8e@oss.tenstorrent.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20260306-atlantis-clocks-v8-3-6c9b14a4aa8e@oss.tenstorrent.com> X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Mar 06, 2026 at 11:12:19AM -0600, Anirudh Srinivasan wrote: > Add driver for clock controller in Tenstorrent Atlantis SoC. This version > of the driver covers clocks from RCPU subsystem. > > 5 types of clocks generated by this controller: PLLs (PLLs > with bypass functionality and an additional Gate clk at output), Shared > Gates (Multiple Gate clks that share an enable bit), standard Muxes, > Dividers and Gates. All clocks are implemented using custom clk ops and > use the regmap interface associated with the syscon. All clocks are derived > from a 24 Mhz oscillator. > > The reset controller is also setup as an auxiliary device of the clock > controller. > > Signed-off-by: Anirudh Srinivasan > --- > MAINTAINERS | 1 + > drivers/clk/Kconfig | 1 + > drivers/clk/Makefile | 1 + > drivers/clk/tenstorrent/Kconfig | 14 + > drivers/clk/tenstorrent/Makefile | 3 + > drivers/clk/tenstorrent/atlantis-prcm.c | 870 ++++++++++++++++++++++++++++++++ > 6 files changed, 890 insertions(+) Hi Stephen, does it make sense for me to create clk branches [1] in the tenstorrent repo on kernel.org for Atlantis patches to go through? Thanks, Drew [1] https://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux.git/ _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv