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* [PATCH v4 0/2] Implement endianess swap macros for RISC-V
@ 2025-04-26 14:56 Ignacio Encinas
  2025-04-26 14:56 ` [PATCH v4 1/2] include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic Ignacio Encinas
                   ` (3 more replies)
  0 siblings, 4 replies; 8+ messages in thread
From: Ignacio Encinas @ 2025-04-26 14:56 UTC (permalink / raw)
  To: Paul Walmsley, Palmer Dabbelt, Alexandre Ghiti, Arnd Bergmann
  Cc: Eric Biggers, linux-riscv, linux-kernel, linux-kernel-mentees,
	skhan, Zhihang Shao, Björn Töpel, linux-arch,
	Ignacio Encinas

Motivated by [1]. A couple of things to note:

RISC-V needs a default implementation to fall back on. There is one
available in include/uapi/linux/swab.h but that header can't be included
from arch/riscv/include/asm/swab.h. Therefore, the first patch in this
series moves the default implementation into asm-generic.

Tested with crc_kunit as pointed out here [2]. I can't provide
performance numbers as I don't have RISC-V hardware yet.

[1] https://lore.kernel.org/all/20250302220426.GC2079@quark.localdomain/
[2] https://lore.kernel.org/all/20250216225530.306980-1-ebiggers@kernel.org/

Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
---
Changes in v4:

- Add missing include in the 1st patch, reported by 
  https://lore.kernel.org/all/202504042300.it9RcOSt-lkp@intel.com/
- Rewrite the ARCH_SWAB macro as suggested by Arnd
- Define __arch_swab64 for CONFIG_32BIT (Ben)
- Link to v3: https://lore.kernel.org/r/20250403-riscv-swab-v3-0-3bf705d80e33@iencinas.com

Arnd, I know you don't like Patch 1 but I tried your suggestions and
couldn't make them work. Please let me know if I missed anything [3] [4]

[3] https://lore.kernel.org/linux-riscv/f5464e26-faa0-48f1-8585-9ce52c8c9f5f@iencinas.com/
[4] https://lore.kernel.org/linux-riscv/b3b59747-0484-4042-bdc4-c067688e3bfe@iencinas.com/

Changes in v3:

PATCH 2:
  Use if(riscv_has_extension_likely) instead of asm goto (Eric). It 
  looks like both versions generate the same assembly. Perhaps we should 
  do the same change in other places such as arch/riscv/include/asm/bitops.h
- Link to v2: https://lore.kernel.org/r/20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com

Changes in v2:
- Introduce first patch factoring out the default implementation into
  asm-generic
- Remove blank line to make checkpatch happy
- Link to v1: https://lore.kernel.org/r/20250310-riscv-swab-v1-1-34652ef1ee96@iencinas.com

---
Ignacio Encinas (2):
      include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic
      riscv: introduce asm/swab.h

 arch/riscv/include/asm/swab.h   | 62 +++++++++++++++++++++++++++++++++++++++++
 include/uapi/asm-generic/swab.h | 33 ++++++++++++++++++++++
 include/uapi/linux/swab.h       | 33 +---------------------
 3 files changed, 96 insertions(+), 32 deletions(-)
---
base-commit: a7f2e10ecd8f18b83951b0bab47ddaf48f93bf47
change-id: 20250307-riscv-swab-b81b94a9ac1b

Best regards,
-- 
Ignacio Encinas <ignacio@iencinas.com>


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^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v4 1/2] include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic
  2025-04-26 14:56 [PATCH v4 0/2] Implement endianess swap macros for RISC-V Ignacio Encinas
@ 2025-04-26 14:56 ` Ignacio Encinas
  2025-05-11 11:23   ` David Laight
  2025-04-26 14:56 ` [PATCH v4 2/2] riscv: introduce asm/swab.h Ignacio Encinas
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 8+ messages in thread
From: Ignacio Encinas @ 2025-04-26 14:56 UTC (permalink / raw)
  To: Paul Walmsley, Palmer Dabbelt, Alexandre Ghiti, Arnd Bergmann
  Cc: Eric Biggers, linux-riscv, linux-kernel, linux-kernel-mentees,
	skhan, Zhihang Shao, Björn Töpel, linux-arch,
	Ignacio Encinas

Move the default byteswap implementation into asm-generic so that it can
be included from arch code.

This is required by RISC-V in order to have a fallback implementation
without duplicating it.

Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
---
 include/uapi/asm-generic/swab.h | 33 +++++++++++++++++++++++++++++++++
 include/uapi/linux/swab.h       | 33 +--------------------------------
 2 files changed, 34 insertions(+), 32 deletions(-)

diff --git a/include/uapi/asm-generic/swab.h b/include/uapi/asm-generic/swab.h
index f2da4e4fd4d1..232e81661dc5 100644
--- a/include/uapi/asm-generic/swab.h
+++ b/include/uapi/asm-generic/swab.h
@@ -3,6 +3,7 @@
 #define _ASM_GENERIC_SWAB_H
 
 #include <asm/bitsperlong.h>
+#include <linux/types.h>
 
 /*
  * 32 bit architectures typically (but not always) want to
@@ -16,4 +17,36 @@
 #endif
 #endif
 
+/*
+ * casts are necessary for constants, because we never know how for sure
+ * how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way.
+ */
+#define ___constant_swab16(x) ((__u16)(				\
+	(((__u16)(x) & (__u16)0x00ffU) << 8) |			\
+	(((__u16)(x) & (__u16)0xff00U) >> 8)))
+
+#define ___constant_swab32(x) ((__u32)(				\
+	(((__u32)(x) & (__u32)0x000000ffUL) << 24) |		\
+	(((__u32)(x) & (__u32)0x0000ff00UL) <<  8) |		\
+	(((__u32)(x) & (__u32)0x00ff0000UL) >>  8) |		\
+	(((__u32)(x) & (__u32)0xff000000UL) >> 24)))
+
+#define ___constant_swab64(x) ((__u64)(				\
+	(((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) |	\
+	(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) |	\
+	(((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) |	\
+	(((__u64)(x) & (__u64)0x00000000ff000000ULL) <<  8) |	\
+	(((__u64)(x) & (__u64)0x000000ff00000000ULL) >>  8) |	\
+	(((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) |	\
+	(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) |	\
+	(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56)))
+
+#define ___constant_swahw32(x) ((__u32)(			\
+	(((__u32)(x) & (__u32)0x0000ffffUL) << 16) |		\
+	(((__u32)(x) & (__u32)0xffff0000UL) >> 16)))
+
+#define ___constant_swahb32(x) ((__u32)(			\
+	(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) |		\
+	(((__u32)(x) & (__u32)0xff00ff00UL) >> 8)))
+
 #endif /* _ASM_GENERIC_SWAB_H */
diff --git a/include/uapi/linux/swab.h b/include/uapi/linux/swab.h
index 01717181339e..ca808c492996 100644
--- a/include/uapi/linux/swab.h
+++ b/include/uapi/linux/swab.h
@@ -6,38 +6,7 @@
 #include <linux/stddef.h>
 #include <asm/bitsperlong.h>
 #include <asm/swab.h>
-
-/*
- * casts are necessary for constants, because we never know how for sure
- * how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way.
- */
-#define ___constant_swab16(x) ((__u16)(				\
-	(((__u16)(x) & (__u16)0x00ffU) << 8) |			\
-	(((__u16)(x) & (__u16)0xff00U) >> 8)))
-
-#define ___constant_swab32(x) ((__u32)(				\
-	(((__u32)(x) & (__u32)0x000000ffUL) << 24) |		\
-	(((__u32)(x) & (__u32)0x0000ff00UL) <<  8) |		\
-	(((__u32)(x) & (__u32)0x00ff0000UL) >>  8) |		\
-	(((__u32)(x) & (__u32)0xff000000UL) >> 24)))
-
-#define ___constant_swab64(x) ((__u64)(				\
-	(((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) |	\
-	(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) |	\
-	(((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) |	\
-	(((__u64)(x) & (__u64)0x00000000ff000000ULL) <<  8) |	\
-	(((__u64)(x) & (__u64)0x000000ff00000000ULL) >>  8) |	\
-	(((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) |	\
-	(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) |	\
-	(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56)))
-
-#define ___constant_swahw32(x) ((__u32)(			\
-	(((__u32)(x) & (__u32)0x0000ffffUL) << 16) |		\
-	(((__u32)(x) & (__u32)0xffff0000UL) >> 16)))
-
-#define ___constant_swahb32(x) ((__u32)(			\
-	(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) |		\
-	(((__u32)(x) & (__u32)0xff00ff00UL) >> 8)))
+#include <asm-generic/swab.h>
 
 /*
  * Implement the following as inlines, but define the interface using

-- 
2.49.0


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^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH v4 2/2] riscv: introduce asm/swab.h
  2025-04-26 14:56 [PATCH v4 0/2] Implement endianess swap macros for RISC-V Ignacio Encinas
  2025-04-26 14:56 ` [PATCH v4 1/2] include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic Ignacio Encinas
@ 2025-04-26 14:56 ` Ignacio Encinas
  2025-05-08 17:32 ` [PATCH v4 0/2] Implement endianess swap macros for RISC-V Palmer Dabbelt
  2025-05-16 14:37 ` Alexandre Ghiti
  3 siblings, 0 replies; 8+ messages in thread
From: Ignacio Encinas @ 2025-04-26 14:56 UTC (permalink / raw)
  To: Paul Walmsley, Palmer Dabbelt, Alexandre Ghiti, Arnd Bergmann
  Cc: Eric Biggers, linux-riscv, linux-kernel, linux-kernel-mentees,
	skhan, Zhihang Shao, Björn Töpel, linux-arch,
	Ignacio Encinas

Implement endianness swap macros for RISC-V.

Use the rev8 instruction when Zbb is available. Otherwise, rely on the
default mask-and-shift implementation.

Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
---
 arch/riscv/include/asm/swab.h | 62 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/arch/riscv/include/asm/swab.h b/arch/riscv/include/asm/swab.h
new file mode 100644
index 000000000000..629f6164c1f3
--- /dev/null
+++ b/arch/riscv/include/asm/swab.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASM_RISCV_SWAB_H
+#define _ASM_RISCV_SWAB_H
+
+#include <linux/types.h>
+#include <linux/compiler.h>
+#include <asm/cpufeature-macros.h>
+#include <asm/hwcap.h>
+#include <asm-generic/swab.h>
+
+#if defined(CONFIG_RISCV_ISA_ZBB) && !defined(NO_ALTERNATIVE)
+
+#define ARCH_SWAB(size, value)						\
+({									\
+	unsigned long x = value;					\
+									\
+	if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBB)) {            \
+		asm volatile (".option push\n"				\
+			      ".option arch,+zbb\n"			\
+			      "rev8 %0, %1\n"				\
+			      ".option pop\n"				\
+			      : "=r" (x) : "r" (x));			\
+		x = x >> (BITS_PER_LONG - size);			\
+	} else {                                                        \
+		x = ___constant_swab##size(value);                      \
+	}								\
+	x;								\
+})
+
+static __always_inline __u16 __arch_swab16(__u16 value)
+{
+	return ARCH_SWAB(16, value);
+}
+
+static __always_inline __u32 __arch_swab32(__u32 value)
+{
+	return ARCH_SWAB(32, value);
+}
+
+#ifdef CONFIG_64BIT
+static __always_inline __u64 __arch_swab64(__u64 value)
+{
+	return ARCH_SWAB(64, value);
+}
+#else
+static __always_inline __u64 __arch_swab64(__u64 value)
+{
+	__u32 h = value >> 32;
+	__u32 l = value & ((1ULL << 32) - 1);
+
+	return ((__u64)(__arch_swab32(l)) << 32) | ((__u64)(__arch_swab32(h)));
+}
+#endif
+
+#define __arch_swab64 __arch_swab64
+#define __arch_swab32 __arch_swab32
+#define __arch_swab16 __arch_swab16
+
+#undef ARCH_SWAB
+
+#endif /* defined(CONFIG_RISCV_ISA_ZBB) && !defined(NO_ALTERNATIVE) */
+#endif /* _ASM_RISCV_SWAB_H */

-- 
2.49.0


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^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH v4 0/2] Implement endianess swap macros for RISC-V
  2025-04-26 14:56 [PATCH v4 0/2] Implement endianess swap macros for RISC-V Ignacio Encinas
  2025-04-26 14:56 ` [PATCH v4 1/2] include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic Ignacio Encinas
  2025-04-26 14:56 ` [PATCH v4 2/2] riscv: introduce asm/swab.h Ignacio Encinas
@ 2025-05-08 17:32 ` Palmer Dabbelt
  2025-05-16 14:37 ` Alexandre Ghiti
  3 siblings, 0 replies; 8+ messages in thread
From: Palmer Dabbelt @ 2025-05-08 17:32 UTC (permalink / raw)
  To: ignacio, Arnd Bergmann
  Cc: Paul Walmsley, alex, ebiggers, linux-riscv, linux-kernel,
	linux-kernel-mentees, skhan, zhihang.shao.iscas, bjorn,
	linux-arch, ignacio

On Sat, 26 Apr 2025 07:56:17 PDT (-0700), ignacio@iencinas.com wrote:
> Motivated by [1]. A couple of things to note:
>
> RISC-V needs a default implementation to fall back on. There is one
> available in include/uapi/linux/swab.h but that header can't be included
> from arch/riscv/include/asm/swab.h. Therefore, the first patch in this
> series moves the default implementation into asm-generic.

This seems fine to me, so 

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>

It's asm-generic, though, so I usually try to wait for a review from 
Arnd for those.

> Tested with crc_kunit as pointed out here [2]. I can't provide
> performance numbers as I don't have RISC-V hardware yet.
>
> [1] https://lore.kernel.org/all/20250302220426.GC2079@quark.localdomain/
> [2] https://lore.kernel.org/all/20250216225530.306980-1-ebiggers@kernel.org/
>
> Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
> ---
> Changes in v4:
>
> - Add missing include in the 1st patch, reported by
>   https://lore.kernel.org/all/202504042300.it9RcOSt-lkp@intel.com/
> - Rewrite the ARCH_SWAB macro as suggested by Arnd
> - Define __arch_swab64 for CONFIG_32BIT (Ben)
> - Link to v3: https://lore.kernel.org/r/20250403-riscv-swab-v3-0-3bf705d80e33@iencinas.com
>
> Arnd, I know you don't like Patch 1 but I tried your suggestions and
> couldn't make them work. Please let me know if I missed anything [3] [4]
>
> [3] https://lore.kernel.org/linux-riscv/f5464e26-faa0-48f1-8585-9ce52c8c9f5f@iencinas.com/
> [4] https://lore.kernel.org/linux-riscv/b3b59747-0484-4042-bdc4-c067688e3bfe@iencinas.com/
>
> Changes in v3:
>
> PATCH 2:
>   Use if(riscv_has_extension_likely) instead of asm goto (Eric). It
>   looks like both versions generate the same assembly. Perhaps we should
>   do the same change in other places such as arch/riscv/include/asm/bitops.h
> - Link to v2: https://lore.kernel.org/r/20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com
>
> Changes in v2:
> - Introduce first patch factoring out the default implementation into
>   asm-generic
> - Remove blank line to make checkpatch happy
> - Link to v1: https://lore.kernel.org/r/20250310-riscv-swab-v1-1-34652ef1ee96@iencinas.com
>
> ---
> Ignacio Encinas (2):
>       include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic
>       riscv: introduce asm/swab.h
>
>  arch/riscv/include/asm/swab.h   | 62 +++++++++++++++++++++++++++++++++++++++++
>  include/uapi/asm-generic/swab.h | 33 ++++++++++++++++++++++
>  include/uapi/linux/swab.h       | 33 +---------------------
>  3 files changed, 96 insertions(+), 32 deletions(-)
> ---
> base-commit: a7f2e10ecd8f18b83951b0bab47ddaf48f93bf47
> change-id: 20250307-riscv-swab-b81b94a9ac1b
>
> Best regards,

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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v4 1/2] include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic
  2025-04-26 14:56 ` [PATCH v4 1/2] include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic Ignacio Encinas
@ 2025-05-11 11:23   ` David Laight
  0 siblings, 0 replies; 8+ messages in thread
From: David Laight @ 2025-05-11 11:23 UTC (permalink / raw)
  To: Ignacio Encinas
  Cc: Paul Walmsley, Palmer Dabbelt, Alexandre Ghiti, Arnd Bergmann,
	Eric Biggers, linux-riscv, linux-kernel, linux-kernel-mentees,
	skhan, Zhihang Shao, Björn Töpel, linux-arch

On Sat, 26 Apr 2025 16:56:18 +0200
Ignacio Encinas <ignacio@iencinas.com> wrote:

> Move the default byteswap implementation into asm-generic so that it can
> be included from arch code.
> 
> This is required by RISC-V in order to have a fallback implementation
> without duplicating it.
> 
> Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
> ---
>  include/uapi/asm-generic/swab.h | 33 +++++++++++++++++++++++++++++++++
>  include/uapi/linux/swab.h       | 33 +--------------------------------
>  2 files changed, 34 insertions(+), 32 deletions(-)
> 
> diff --git a/include/uapi/asm-generic/swab.h b/include/uapi/asm-generic/swab.h
> index f2da4e4fd4d1..232e81661dc5 100644
> --- a/include/uapi/asm-generic/swab.h
> +++ b/include/uapi/asm-generic/swab.h
> @@ -3,6 +3,7 @@
>  #define _ASM_GENERIC_SWAB_H
>  
>  #include <asm/bitsperlong.h>
> +#include <linux/types.h>
>  
>  /*
>   * 32 bit architectures typically (but not always) want to
> @@ -16,4 +17,36 @@
>  #endif
>  #endif
>  
> +/*
> + * casts are necessary for constants, because we never know how for sure
> + * how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way.

I know you are just moving the code, but that comment just isn't right.
Linux pretty much assumes that ULL is 64bit and U 32bit (UL varies).

So the UL constants should just be U ones (int isn't going to be 16 bits).

Not only that, but the code requires that the (__unn) casts don't
truncate the values. Performing the maths on a larger type isn't
going to change the value of the result.

Then we get to the integer promotion that does an implicit conversion
of the return of all the (__u16) casts back to signed integer.
So it may be better to leave/make the result of swap16() unsigned int
rather than casting it to __u16 and getting it promoted to int.

The only plausibly necessary cast is a (__u32) one in the result
of (except swap64()) to stop the compiler doing 64bit maths with the
result when the constant has a 64bit type (and all the other casts are
removed).

	David

> + */
> +#define ___constant_swab16(x) ((__u16)(				\
> +	(((__u16)(x) & (__u16)0x00ffU) << 8) |			\
> +	(((__u16)(x) & (__u16)0xff00U) >> 8)))
> +
> +#define ___constant_swab32(x) ((__u32)(				\
> +	(((__u32)(x) & (__u32)0x000000ffUL) << 24) |		\
> +	(((__u32)(x) & (__u32)0x0000ff00UL) <<  8) |		\
> +	(((__u32)(x) & (__u32)0x00ff0000UL) >>  8) |		\
> +	(((__u32)(x) & (__u32)0xff000000UL) >> 24)))
> +
> +#define ___constant_swab64(x) ((__u64)(				\
> +	(((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) |	\
> +	(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) |	\
> +	(((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) |	\
> +	(((__u64)(x) & (__u64)0x00000000ff000000ULL) <<  8) |	\
> +	(((__u64)(x) & (__u64)0x000000ff00000000ULL) >>  8) |	\
> +	(((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) |	\
> +	(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) |	\
> +	(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56)))
> +
> +#define ___constant_swahw32(x) ((__u32)(			\
> +	(((__u32)(x) & (__u32)0x0000ffffUL) << 16) |		\
> +	(((__u32)(x) & (__u32)0xffff0000UL) >> 16)))
> +
> +#define ___constant_swahb32(x) ((__u32)(			\
> +	(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) |		\
> +	(((__u32)(x) & (__u32)0xff00ff00UL) >> 8)))
> +
>  #endif /* _ASM_GENERIC_SWAB_H */
> diff --git a/include/uapi/linux/swab.h b/include/uapi/linux/swab.h
> index 01717181339e..ca808c492996 100644
> --- a/include/uapi/linux/swab.h
> +++ b/include/uapi/linux/swab.h
> @@ -6,38 +6,7 @@
>  #include <linux/stddef.h>
>  #include <asm/bitsperlong.h>
>  #include <asm/swab.h>
> -
> -/*
> - * casts are necessary for constants, because we never know how for sure
> - * how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way.
> - */
> -#define ___constant_swab16(x) ((__u16)(				\
> -	(((__u16)(x) & (__u16)0x00ffU) << 8) |			\
> -	(((__u16)(x) & (__u16)0xff00U) >> 8)))
> -
> -#define ___constant_swab32(x) ((__u32)(				\
> -	(((__u32)(x) & (__u32)0x000000ffUL) << 24) |		\
> -	(((__u32)(x) & (__u32)0x0000ff00UL) <<  8) |		\
> -	(((__u32)(x) & (__u32)0x00ff0000UL) >>  8) |		\
> -	(((__u32)(x) & (__u32)0xff000000UL) >> 24)))
> -
> -#define ___constant_swab64(x) ((__u64)(				\
> -	(((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) |	\
> -	(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) |	\
> -	(((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) |	\
> -	(((__u64)(x) & (__u64)0x00000000ff000000ULL) <<  8) |	\
> -	(((__u64)(x) & (__u64)0x000000ff00000000ULL) >>  8) |	\
> -	(((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) |	\
> -	(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) |	\
> -	(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56)))
> -
> -#define ___constant_swahw32(x) ((__u32)(			\
> -	(((__u32)(x) & (__u32)0x0000ffffUL) << 16) |		\
> -	(((__u32)(x) & (__u32)0xffff0000UL) >> 16)))
> -
> -#define ___constant_swahb32(x) ((__u32)(			\
> -	(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) |		\
> -	(((__u32)(x) & (__u32)0xff00ff00UL) >> 8)))
> +#include <asm-generic/swab.h>
>  
>  /*
>   * Implement the following as inlines, but define the interface using
> 


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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v4 0/2] Implement endianess swap macros for RISC-V
  2025-04-26 14:56 [PATCH v4 0/2] Implement endianess swap macros for RISC-V Ignacio Encinas
                   ` (2 preceding siblings ...)
  2025-05-08 17:32 ` [PATCH v4 0/2] Implement endianess swap macros for RISC-V Palmer Dabbelt
@ 2025-05-16 14:37 ` Alexandre Ghiti
  2025-07-09 15:12   ` Alexandre Ghiti
  3 siblings, 1 reply; 8+ messages in thread
From: Alexandre Ghiti @ 2025-05-16 14:37 UTC (permalink / raw)
  To: Ignacio Encinas, Paul Walmsley, Palmer Dabbelt, Arnd Bergmann
  Cc: Eric Biggers, linux-riscv, linux-kernel, linux-kernel-mentees,
	skhan, Zhihang Shao, Björn Töpel, linux-arch

Hi Arnd,

Do you think we can merge that for 6.16? It is nice improvement for us.

Thanks,

Alex

On 26/04/2025 16:56, Ignacio Encinas wrote:
> Motivated by [1]. A couple of things to note:
>
> RISC-V needs a default implementation to fall back on. There is one
> available in include/uapi/linux/swab.h but that header can't be included
> from arch/riscv/include/asm/swab.h. Therefore, the first patch in this
> series moves the default implementation into asm-generic.
>
> Tested with crc_kunit as pointed out here [2]. I can't provide
> performance numbers as I don't have RISC-V hardware yet.
>
> [1] https://lore.kernel.org/all/20250302220426.GC2079@quark.localdomain/
> [2] https://lore.kernel.org/all/20250216225530.306980-1-ebiggers@kernel.org/
>
> Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
> ---
> Changes in v4:
>
> - Add missing include in the 1st patch, reported by
>    https://lore.kernel.org/all/202504042300.it9RcOSt-lkp@intel.com/
> - Rewrite the ARCH_SWAB macro as suggested by Arnd
> - Define __arch_swab64 for CONFIG_32BIT (Ben)
> - Link to v3: https://lore.kernel.org/r/20250403-riscv-swab-v3-0-3bf705d80e33@iencinas.com
>
> Arnd, I know you don't like Patch 1 but I tried your suggestions and
> couldn't make them work. Please let me know if I missed anything [3] [4]
>
> [3] https://lore.kernel.org/linux-riscv/f5464e26-faa0-48f1-8585-9ce52c8c9f5f@iencinas.com/
> [4] https://lore.kernel.org/linux-riscv/b3b59747-0484-4042-bdc4-c067688e3bfe@iencinas.com/
>
> Changes in v3:
>
> PATCH 2:
>    Use if(riscv_has_extension_likely) instead of asm goto (Eric). It
>    looks like both versions generate the same assembly. Perhaps we should
>    do the same change in other places such as arch/riscv/include/asm/bitops.h
> - Link to v2: https://lore.kernel.org/r/20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com
>
> Changes in v2:
> - Introduce first patch factoring out the default implementation into
>    asm-generic
> - Remove blank line to make checkpatch happy
> - Link to v1: https://lore.kernel.org/r/20250310-riscv-swab-v1-1-34652ef1ee96@iencinas.com
>
> ---
> Ignacio Encinas (2):
>        include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic
>        riscv: introduce asm/swab.h
>
>   arch/riscv/include/asm/swab.h   | 62 +++++++++++++++++++++++++++++++++++++++++
>   include/uapi/asm-generic/swab.h | 33 ++++++++++++++++++++++
>   include/uapi/linux/swab.h       | 33 +---------------------
>   3 files changed, 96 insertions(+), 32 deletions(-)
> ---
> base-commit: a7f2e10ecd8f18b83951b0bab47ddaf48f93bf47
> change-id: 20250307-riscv-swab-b81b94a9ac1b
>
> Best regards,

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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v4 0/2] Implement endianess swap macros for RISC-V
  2025-05-16 14:37 ` Alexandre Ghiti
@ 2025-07-09 15:12   ` Alexandre Ghiti
  2025-07-16 13:09     ` Alexandre Ghiti
  0 siblings, 1 reply; 8+ messages in thread
From: Alexandre Ghiti @ 2025-07-09 15:12 UTC (permalink / raw)
  To: Ignacio Encinas, Paul Walmsley, Palmer Dabbelt, Arnd Bergmann
  Cc: Eric Biggers, linux-riscv, linux-kernel, linux-kernel-mentees,
	skhan, Zhihang Shao, Björn Töpel, linux-arch

Hi Arnd,

Gentle ping as we would like to merge this in the riscv tree but we need 
your ack (or nack).

Thanks,

Alex

On 5/16/25 16:37, Alexandre Ghiti wrote:
> Hi Arnd,
>
> Do you think we can merge that for 6.16? It is nice improvement for us.
>
> Thanks,
>
> Alex
>
> On 26/04/2025 16:56, Ignacio Encinas wrote:
>> Motivated by [1]. A couple of things to note:
>>
>> RISC-V needs a default implementation to fall back on. There is one
>> available in include/uapi/linux/swab.h but that header can't be included
>> from arch/riscv/include/asm/swab.h. Therefore, the first patch in this
>> series moves the default implementation into asm-generic.
>>
>> Tested with crc_kunit as pointed out here [2]. I can't provide
>> performance numbers as I don't have RISC-V hardware yet.
>>
>> [1] https://lore.kernel.org/all/20250302220426.GC2079@quark.localdomain/
>> [2] 
>> https://lore.kernel.org/all/20250216225530.306980-1-ebiggers@kernel.org/
>>
>> Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
>> ---
>> Changes in v4:
>>
>> - Add missing include in the 1st patch, reported by
>> https://lore.kernel.org/all/202504042300.it9RcOSt-lkp@intel.com/
>> - Rewrite the ARCH_SWAB macro as suggested by Arnd
>> - Define __arch_swab64 for CONFIG_32BIT (Ben)
>> - Link to v3: 
>> https://lore.kernel.org/r/20250403-riscv-swab-v3-0-3bf705d80e33@iencinas.com
>>
>> Arnd, I know you don't like Patch 1 but I tried your suggestions and
>> couldn't make them work. Please let me know if I missed anything [3] [4]
>>
>> [3] 
>> https://lore.kernel.org/linux-riscv/f5464e26-faa0-48f1-8585-9ce52c8c9f5f@iencinas.com/
>> [4] 
>> https://lore.kernel.org/linux-riscv/b3b59747-0484-4042-bdc4-c067688e3bfe@iencinas.com/
>>
>> Changes in v3:
>>
>> PATCH 2:
>>    Use if(riscv_has_extension_likely) instead of asm goto (Eric). It
>>    looks like both versions generate the same assembly. Perhaps we 
>> should
>>    do the same change in other places such as 
>> arch/riscv/include/asm/bitops.h
>> - Link to v2: 
>> https://lore.kernel.org/r/20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com
>>
>> Changes in v2:
>> - Introduce first patch factoring out the default implementation into
>>    asm-generic
>> - Remove blank line to make checkpatch happy
>> - Link to v1: 
>> https://lore.kernel.org/r/20250310-riscv-swab-v1-1-34652ef1ee96@iencinas.com
>>
>> ---
>> Ignacio Encinas (2):
>>        include/uapi/linux/swab.h: move default implementation for 
>> swab macros into asm-generic
>>        riscv: introduce asm/swab.h
>>
>>   arch/riscv/include/asm/swab.h   | 62 
>> +++++++++++++++++++++++++++++++++++++++++
>>   include/uapi/asm-generic/swab.h | 33 ++++++++++++++++++++++
>>   include/uapi/linux/swab.h       | 33 +---------------------
>>   3 files changed, 96 insertions(+), 32 deletions(-)
>> ---
>> base-commit: a7f2e10ecd8f18b83951b0bab47ddaf48f93bf47
>> change-id: 20250307-riscv-swab-b81b94a9ac1b
>>
>> Best regards,

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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v4 0/2] Implement endianess swap macros for RISC-V
  2025-07-09 15:12   ` Alexandre Ghiti
@ 2025-07-16 13:09     ` Alexandre Ghiti
  0 siblings, 0 replies; 8+ messages in thread
From: Alexandre Ghiti @ 2025-07-16 13:09 UTC (permalink / raw)
  To: Ignacio Encinas, Paul Walmsley, Palmer Dabbelt, Arnd Bergmann
  Cc: Eric Biggers, linux-riscv, linux-kernel, linux-kernel-mentees,
	skhan, Zhihang Shao, Björn Töpel, linux-arch

Hi Ignacio,

Can you come up with a new version that only touches the riscv tree so 
that we can merge this in 6.17? Not ideal but I guess we can live with 
code duplication for now.

Thanks,

Alex

On 7/9/25 17:12, Alexandre Ghiti wrote:
> Hi Arnd,
>
> Gentle ping as we would like to merge this in the riscv tree but we 
> need your ack (or nack).
>
> Thanks,
>
> Alex
>
> On 5/16/25 16:37, Alexandre Ghiti wrote:
>> Hi Arnd,
>>
>> Do you think we can merge that for 6.16? It is nice improvement for us.
>>
>> Thanks,
>>
>> Alex
>>
>> On 26/04/2025 16:56, Ignacio Encinas wrote:
>>> Motivated by [1]. A couple of things to note:
>>>
>>> RISC-V needs a default implementation to fall back on. There is one
>>> available in include/uapi/linux/swab.h but that header can't be 
>>> included
>>> from arch/riscv/include/asm/swab.h. Therefore, the first patch in this
>>> series moves the default implementation into asm-generic.
>>>
>>> Tested with crc_kunit as pointed out here [2]. I can't provide
>>> performance numbers as I don't have RISC-V hardware yet.
>>>
>>> [1] 
>>> https://lore.kernel.org/all/20250302220426.GC2079@quark.localdomain/
>>> [2] 
>>> https://lore.kernel.org/all/20250216225530.306980-1-ebiggers@kernel.org/ 
>>>
>>>
>>> Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
>>> ---
>>> Changes in v4:
>>>
>>> - Add missing include in the 1st patch, reported by
>>> https://lore.kernel.org/all/202504042300.it9RcOSt-lkp@intel.com/
>>> - Rewrite the ARCH_SWAB macro as suggested by Arnd
>>> - Define __arch_swab64 for CONFIG_32BIT (Ben)
>>> - Link to v3: 
>>> https://lore.kernel.org/r/20250403-riscv-swab-v3-0-3bf705d80e33@iencinas.com
>>>
>>> Arnd, I know you don't like Patch 1 but I tried your suggestions and
>>> couldn't make them work. Please let me know if I missed anything [3] 
>>> [4]
>>>
>>> [3] 
>>> https://lore.kernel.org/linux-riscv/f5464e26-faa0-48f1-8585-9ce52c8c9f5f@iencinas.com/
>>> [4] 
>>> https://lore.kernel.org/linux-riscv/b3b59747-0484-4042-bdc4-c067688e3bfe@iencinas.com/
>>>
>>> Changes in v3:
>>>
>>> PATCH 2:
>>>    Use if(riscv_has_extension_likely) instead of asm goto (Eric). It
>>>    looks like both versions generate the same assembly. Perhaps we 
>>> should
>>>    do the same change in other places such as 
>>> arch/riscv/include/asm/bitops.h
>>> - Link to v2: 
>>> https://lore.kernel.org/r/20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com
>>>
>>> Changes in v2:
>>> - Introduce first patch factoring out the default implementation into
>>>    asm-generic
>>> - Remove blank line to make checkpatch happy
>>> - Link to v1: 
>>> https://lore.kernel.org/r/20250310-riscv-swab-v1-1-34652ef1ee96@iencinas.com
>>>
>>> ---
>>> Ignacio Encinas (2):
>>>        include/uapi/linux/swab.h: move default implementation for 
>>> swab macros into asm-generic
>>>        riscv: introduce asm/swab.h
>>>
>>>   arch/riscv/include/asm/swab.h   | 62 
>>> +++++++++++++++++++++++++++++++++++++++++
>>>   include/uapi/asm-generic/swab.h | 33 ++++++++++++++++++++++
>>>   include/uapi/linux/swab.h       | 33 +---------------------
>>>   3 files changed, 96 insertions(+), 32 deletions(-)
>>> ---
>>> base-commit: a7f2e10ecd8f18b83951b0bab47ddaf48f93bf47
>>> change-id: 20250307-riscv-swab-b81b94a9ac1b
>>>
>>> Best regards,
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2025-07-16 13:11 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-04-26 14:56 [PATCH v4 0/2] Implement endianess swap macros for RISC-V Ignacio Encinas
2025-04-26 14:56 ` [PATCH v4 1/2] include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic Ignacio Encinas
2025-05-11 11:23   ` David Laight
2025-04-26 14:56 ` [PATCH v4 2/2] riscv: introduce asm/swab.h Ignacio Encinas
2025-05-08 17:32 ` [PATCH v4 0/2] Implement endianess swap macros for RISC-V Palmer Dabbelt
2025-05-16 14:37 ` Alexandre Ghiti
2025-07-09 15:12   ` Alexandre Ghiti
2025-07-16 13:09     ` Alexandre Ghiti

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