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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Mar 16, 2026 at 03:06:59PM +0800, Jia Wang via B4 Relay wrote: > From: Jia Wang > > Add UltraRISC DP1000 SoC PCIe controller devicetree bindings. > > Signed-off-by: Jia Wang > --- > .../bindings/pci/ultrarisc,dp1000-pcie.yaml | 108 +++++++++++++++++++++ > 1 file changed, 108 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml b/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml > new file mode 100644 > index 000000000000..b50ff98dd878 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml > @@ -0,0 +1,108 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/ultrarisc,dp1000-pcie.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: UltraRISC DP1000 PCIe Host Controller > + > +description: | > + UltraRISC DP1000 SoC PCIe host controller is based on the DesignWare PCIe IP. If so, you should probably refer snps,dw-pcie.yaml to avoid some duplication. Regards, Yao Zi _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv