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From: Conor Dooley <conor.dooley@microchip.com>
To: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Cc: <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
	<aou@eecs.berkeley.edu>, <linux-riscv@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <leyfoon.tan@starfivetech.com>,
	<mason.huo@starfivetech.com>
Subject: Re: [PATCH v6 4/4] RISC-V: Add arch functions to support hibernation/suspend-to-disk
Date: Mon, 20 Mar 2023 12:56:18 +0000	[thread overview]
Message-ID: <ad8fcf05-0e3f-4350-b9ad-533cee984580@spud> (raw)
In-Reply-To: <20230314050316.31701-5-jeeheng.sia@starfivetech.com>


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On Tue, Mar 14, 2023 at 01:03:16PM +0800, Sia Jee Heng wrote:
> Low level Arch functions were created to support hibernation.
> swsusp_arch_suspend() relies code from __cpu_suspend_enter() to write
> cpu state onto the stack, then calling swsusp_save() to save the memory
> image.
> 
> Arch specific hibernation header is implemented and is utilized by the
> arch_hibernation_header_restore() and arch_hibernation_header_save()
> functions. The arch specific hibernation header consists of satp, hartid,
> and the cpu_resume address. The kernel built version is also need to be
> saved into the hibernation image header to making sure only the same
> kernel is restore when resume.
> 
> swsusp_arch_resume() creates a temporary page table that covering only
> the linear map. It copies the restore code to a 'safe' page, then start
> to restore the memory image. Once completed, it restores the original
> kernel's page table. It then calls into __hibernate_cpu_resume()
> to restore the CPU context. Finally, it follows the normal hibernation
> path back to the hibernation core.
> 
> To enable hibernation/suspend to disk into RISCV, the below config
> need to be enabled:
> - CONFIG_ARCH_HIBERNATION_HEADER
> - CONFIG_ARCH_HIBERNATION_POSSIBLE
> 
> Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
> Reviewed-by: Mason Huo <mason.huo@starfivetech.com>

> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index c5e42cc37604..473c2a1a6884 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -707,6 +707,12 @@  menu "Power management options"
>  
>  source "kernel/power/Kconfig"
>  
> +config ARCH_HIBERNATION_POSSIBLE
> +	def_bool y
> +
> +config ARCH_HIBERNATION_HEADER
> +	def_bool HIBERNATION
> +
>  endmenu # "Power management options"
>  
>  menu "CPU Power Management"

Since these options are not user-selectable, how come these are
def_bools, rather than just selecting them in the main `config RISCV`
section? Is there some sort of dependency that goes wrong when
structured that way?

> diff --git a/arch/riscv/kernel/hibernate.c b/arch/riscv/kernel/hibernate.c
> new file mode 100644
> index 000000000000..f11be60b0668
> --- /dev/null
> +++ b/arch/riscv/kernel/hibernate.c

> +/**
> + * struct arch_hibernate_hdr_invariants - container to store kernel build version.
> + * @uts_version: to save the build number and date so that the we do not resume with

nit: s/so that the we/so that we/

I noted previously that the page table stuff is beyond me, so modulo
that, I'm happy with how this looks now.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks for adding hibernation support!
Conor.

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  reply	other threads:[~2023-03-20 12:57 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-14  5:03 [PATCH v6 0/4] RISC-V Hibernation Support Sia Jee Heng
2023-03-14  5:03 ` [PATCH v6 1/4] RISC-V: Change suspend_save_csrs and suspend_restore_csrs to public function Sia Jee Heng
2023-03-14  5:03 ` [PATCH v6 2/4] RISC-V: Factor out common code of __cpu_resume_enter() Sia Jee Heng
2023-03-20 12:36   ` Conor Dooley
2023-03-14  5:03 ` [PATCH v6 3/4] RISC-V: mm: Enable huge page support to kernel_page_present() function Sia Jee Heng
2023-03-14  5:03 ` [PATCH v6 4/4] RISC-V: Add arch functions to support hibernation/suspend-to-disk Sia Jee Heng
2023-03-20 12:56   ` Conor Dooley [this message]
2023-03-20  7:20 ` [PATCH v6 0/4] RISC-V Hibernation Support JeeHeng Sia
2023-03-20 12:33   ` Conor Dooley

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