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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Apr 24, 2026 at 02:38:56PM +0300, Ilpo J=E4rvinen wrote: > On Fri, 24 Apr 2026, Jia Wang wrote: ... > Hmm, maybe there should also be macro also for this one which takes the = > fifosize as input and converts it to CPR field vlaue (effectively, the = > macro is an inverse of DW_UART_CPR_FIFO_SIZE()). It would be more readabl= e = > than the literal. But this can be done separately, right? > Also include BUILD_BUG_ON(!IS_ALIGNED(fifosize, 16) + bounds checks) = > inside that macro to catch invalid fifo sizes (+ don't forget the = > necessary headers for those two new things). Hmm... Some devices may have FIFO =3D 8 or 4 bytes (Intel Quark IIRC has le= ss than 16 and it's DW IP). -- = With Best Regards, Andy Shevchenko _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv