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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Aug 05, 2026 at 12:54:42PM -0600, Paul Walmsley wrote: > Hi, > > On Wed, 29 Jul 2026, Drew Fustini wrote: > > > Add support for the srmcfg CSR defined in the Ssqosid ISA extension. > > The CSR contains two fields: > > > > - Resource Control ID (RCID) for resource allocation > > - Monitoring Counter ID (MCID) for tracking resource usage > > > > Requests from a hart to shared resources are tagged with these IDs, > > allowing resource usage to be associated with the running task. > > > > Add a srmcfg field to thread_struct with the same format as the CSR. > > The context-switch path writes the field to the CSR, and > > resctrl_arch_set_closid_rmid() updates it when a task is assigned to a > > resctrl control or monitoring group. > > > > A per-cpu cpu_srmcfg_default holds the default srmcfg for each CPU, set > > by resctrl_arch_set_cpu_default_closid_rmid() on CPU group assignment. > > On context switch, RCID and MCID inherit from the CPU default > > independently: a task whose thread RCID field is zero takes the CPU > > default's RCID, and likewise for MCID. > > Thanks, queued for v7.3, but with one change (below): > > > diff --git a/arch/riscv/include/asm/qos.h b/arch/riscv/include/asm/qos.h > > new file mode 100644 > > index 000000000000..cf19e8438bb9 > > --- /dev/null > > +++ b/arch/riscv/include/asm/qos.h > > @@ -0,0 +1,74 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +#ifndef _ASM_RISCV_QOS_H > > +#define _ASM_RISCV_QOS_H > > + > > +#include > > + > > +#ifdef CONFIG_RISCV_ISA_SSQOSID > > + > > +#include > > +#include > > +#include > > + > > +#include > > +#include > > + > > +/* cached value of srmcfg csr for each cpu */ > > +DECLARE_PER_CPU(u32, cpu_srmcfg); > > + > > +/* default srmcfg value for each cpu, set via resctrl cpu assignment */ > > +DECLARE_PER_CPU(u32, cpu_srmcfg_default); > > + > > +static inline void __switch_to_srmcfg(struct task_struct *next) > > +{ > > + u32 thread_srmcfg, default_srmcfg; > > + > > + thread_srmcfg = READ_ONCE(next->thread.srmcfg); > > What is the intent of the READ_ONCE() here? > > I've dropped it from what's been queued for now. If it's really > needed, please let us know why. > > > thanks, > > - Paul Thanks for queuing this patch. It is okay to leave out the READ_ONCE() since only Patches 1-3 are being applied. The READ_ONCE() is meant to pair with the WRITE_ONCE() in resctrl_arch_set_closid_rmid(), which comes in patch 5. RCID and MCID share the srmcfg csr, and resctrl can update thread.srmcfg from another hart while this task is switched in. Without READ_ONCE(), the compiler may reload the field between the zero test and the two FIELD_GET() calls, so thread_srmcfg could end up with RCID from the old value and MCID from the new one. arm64 MPAM uses READ_ONCE() here for the same reason for mpam_get_regval() in arch/arm64/include/asm/mpam.h Thanks, Drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv