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([2602:47:d48c:8101:716e:2242:a3b5:8079]) by smtp.gmail.com with ESMTPSA id k15-20020a170902c40f00b001869b988d93sm12432107plk.187.2022.12.21.21.32.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Dec 2022 21:32:54 -0800 (PST) Message-ID: Date: Wed, 21 Dec 2022 21:32:51 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break To: Vineet Gupta , Vincent Chen Cc: Florian Weimer , Rich Felker , Andrew Waterman , Palmer Dabbelt , Kito Cheng , =?UTF-8?Q?Christoph_M=c3=bcllner?= , davidlt@rivosinc.com, Arnd Bergmann , =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= , Philipp Tomsich , Szabolcs Nagy , Andy Chiu , Greentime Hu , Aaron Durbin , Andrew de los Reyes , linux-riscv , GNU C Library References: <1631497278-29829-1-git-send-email-vincent.chen@sifive.com> <1631497278-29829-3-git-send-email-vincent.chen@sifive.com> <871r5sd1zq.fsf@oldenburg.str.redhat.com> <20210913135247.GL13220@brightrain.aerifal.cx> <87sfy5ndid.fsf@oldenburg.str.redhat.com> <73c0124c-4794-6e40-460c-b26df407f322@rivosinc.com> <50c598a6-e3b3-3062-abe7-23a406067533@rivosinc.com> <7430f494-9b43-5e03-c1e9-6b83e2611a11@rivosinc.com> Content-Language: en-US From: Richard Henderson In-Reply-To: <7430f494-9b43-5e03-c1e9-6b83e2611a11@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221221_213257_742280_E0F2E047 X-CRM114-Status: GOOD ( 10.83 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 12/21/22 11:52, Vineet Gupta wrote: > This is not an issue, if we don't change sigcontext (in kernel and glibc) - it is > essentially the case of existing binaries. kernel still saves regs on user stack, in > rt_sigframe, its just that userspace is not able to access them in SA_SIGINFO signal > handers. aarch64 have this implemented this approach and it is likely they can't do > that either for SVE regs. aarch64 can certainly access the SVE regs on the signal stack. It simply requires that you parse the chain of extensions within __reserved to find it. It's quite well designed, really. What you can't do is "only" declare a sigcontext_t and be able to construct a new context, nor copy the entire context via structure assignment. There is room within the risc-v context for a similar scheme, via sigcontext.sc_fpregs.q.reserved[3] E.g. reserved[0] -> magic reserved[1] -> displacement to "extension area" reserved[2] -> size of "extension area" Thus the area can be located anywhere within 4GB and expand to 4GB. Not that I'd hope any signal frame would require 4GB. :-) r~ _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv