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Tue, 11 Feb 2025 01:14:15 -0800 (PST) Received: from giga-mm.home ([2a02:1210:861b:6f00:82ee:73ff:feb8:99e3]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dbdd1af07sm14477397f8f.15.2025.02.11.01.14.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Feb 2025 01:14:14 -0800 (PST) Message-ID: Subject: Re: [PATCH 02/10] riscv: dts: sophgo: cv18xx: Split into CPU core and peripheral parts From: Alexander Sverdlin To: Krzysztof Kozlowski , soc@lists.linux.dev Cc: Chen Wang , Inochi Amaoto , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Haylen Chu , linux-arm-kernel@lists.infradead.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Arnd Bergmann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Date: Tue, 11 Feb 2025 10:14:11 +0100 In-Reply-To: <3f548621-6f66-41ee-a23f-ae4a8345061a@kernel.org> References: <20250209220646.1090868-1-alexander.sverdlin@gmail.com> <20250209220646.1090868-3-alexander.sverdlin@gmail.com> <7fa3501bd59697e65ab1387e25cb815180c3378c.camel@gmail.com> <3f548621-6f66-41ee-a23f-ae4a8345061a@kernel.org> User-Agent: Evolution 3.54.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250211_011417_716763_0B1FA0E9 X-CRM114-Status: GOOD ( 15.58 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hi Krzysztof! On Tue, 2025-02-11 at 09:08 +0100, Krzysztof Kozlowski wrote: > > > > +/ { > > > > + osc: oscillator { > > > > + compatible = "fixed-clock"; > > > > > > I really doubt that external oscillator is a peripheral. This is either > > > part of board or the SoC. > > > > This is actually a problem of the original cv18xx.dtsi [1]. Do you think > > I need to fix it as part of my series? This would touch all the pure > > RiscV boards (using CV18xx SoCs, not SG200x SoCs), which I could avoid > > otherwise. > > You are moving the node out of cv18xx.dtsi, so you can move it to final > place for example. But I do not insist, because I also do not know the > final (truly correct) place - don't know the hardware here. Fortunately, problem disappeared by itself in v2 [1], now I don't touch it any longer and only move CPU and int controller into corresponding SoCs, so the oscillator falls into "could be coded as a fixed-clock in the SoC DTSI" cathegory of the coding style. Link: https://lore.kernel.org/soc/20250210220951.1248533-2-alexander.sverdlin@gmail.com/ -- Alexander Sverdlin. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv