Re: [PATCH v2 4/8] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option

Conor.Dooley
2022-08-15T20:06:14Z

On 15/08/2022 20:57, Lad, Prabhakar wrote:
> Hi Conor,
>
> Thank you for the review.
>
> On Mon, Aug 15, 2022 at 8:10 PM <Conor.Dooley@microchip.com> wrote:
>>
>> On 15/08/2022 16:14, Lad Prabhakar wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
>>> (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
>>> of the Renesas drivers depend on this config option.
>>
>> Hey Lad,
>>
>> I think I said something similar on v1, but I said it again
>> to Samuel today so I may as well repost here too:
>> "I think this and patch 12/12 with the defconfig changes should be
> patch 8/8.

It was a direct copy paste, hence the quotes ;)
Your patch 8/8 lines up with the current symbols while Samuel's
doesn't.

>
>
>> deferred until post LPC (which still leaves plenty of time for
>> making the 6.1 merge window). We already have like 4 different
>> approaches between the existing SOC_FOO symbols & two more when
>> D1 stuff and the Renesas stuff is considered.
>>
>> Plan is to decide at LPC on one approach for what to do with
>> Kconfig.socs & to me it seems like a good idea to do what's being
>> done here - it's likely that further arm vendors will move and
>> keeping the common symbols makes a lot of sense to me..."
>>
> Sure not a problem. But delaying patch 4 and 8 will make RZ/Five SoC
> not buildable. Is that OK?

No no, I prob just did a bad job of explaining. I meant more
along the lines of "I don't think this is the right approach
but I will defer reviewing until after LPC, when we have picked
one approach to use for everyone". I'm sorry, poor choice of
words maybe. I didn't mean drop these patches so that it does
not build, keeping it buildable until then so that we can all
test/review is the way to go. Not your fault we've done 4 different
things so far!

Hopefully that makes a bit more sense?

>
>> Also, for the sake of my OCD could you pick either riscv or
>> RISC-V and use it for the whole series? Pedantic I guess, but
>> /shrug
>>
> Sorry did you mean I add riscv/RISC-V in the subject?

You have some patches with RISC-V and some with riscv.
What I meant was use one of the two for the whole series.
Thanks,
Conor.

>
> Cheers,
> Prabhakar
>
>
>> Thanks,
>> Conor.
>>
>>>
>>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>>> ---
>>> v1->v2
>>> * No Change
>>> ---
>>> arch/riscv/Kconfig.socs | 14 ++++++++++++++
>>> 1 file changed, 14 insertions(+)
>>>
>>> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
>>> index 69774bb362d6..91b7f38b77a8 100644
>>> --- a/arch/riscv/Kconfig.socs
>>> +++ b/arch/riscv/Kconfig.socs
>>> @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE
>>>
>>> endif # SOC_CANAAN
>>>
>>> +config ARCH_RENESAS
>>> + bool
>>> + select GPIOLIB
>>> + select PINCTRL
>>> + select SOC_BUS
>>> +
>>> +config SOC_RENESAS_RZFIVE
>>> + bool "Renesas RZ/Five SoC"
>>> + select ARCH_R9A07G043
>>> + select ARCH_RENESAS
>>> + select RESET_CONTROLLER
>>> + help
>>> + This enables support for Renesas RZ/Five SoC.
>>> +
>>> endmenu # "SoC selection"
>>> --
>>> 2.25.1
>>>
>>
>
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