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30 Nov 2024 20:08:48 +0000 Received: from EX19MTAEUA002.ant.amazon.com [10.0.10.100:15968] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.11.83:2525] with esmtp (Farcaster) id 6ac350d1-00ea-4165-8f54-56833500c432; Sat, 30 Nov 2024 20:08:45 +0000 (UTC) X-Farcaster-Flow-ID: 6ac350d1-00ea-4165-8f54-56833500c432 Received: from EX19D018EUA004.ant.amazon.com (10.252.50.85) by EX19MTAEUA002.ant.amazon.com (10.252.50.126) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.35; Sat, 30 Nov 2024 20:08:45 +0000 Received: from EX19D018EUA004.ant.amazon.com (10.252.50.85) by EX19D018EUA004.ant.amazon.com (10.252.50.85) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Sat, 30 Nov 2024 20:08:44 +0000 Received: from EX19D018EUA004.ant.amazon.com ([fe80::e53:84f8:3456:a97d]) by EX19D018EUA004.ant.amazon.com ([fe80::e53:84f8:3456:a97d%3]) with mapi id 15.02.1258.034; Sat, 30 Nov 2024 20:08:44 +0000 From: "Farber, Eliav" To: Thomas Gleixner , "linux@armlinux.org.uk" , "catalin.marinas@arm.com" , "will@kernel.org" , "mpe@ellerman.id.au" , "npiggin@gmail.com" , "christophe.leroy@csgroup.eu" , "naveen@kernel.org" , "maddy@linux.ibm.com" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "aou@eecs.berkeley.edu" , "ebiederm@xmission.com" , "akpm@linux-foundation.org" , "bhe@redhat.com" , "hbathini@linux.ibm.com" , "sourabhjain@linux.ibm.com" , "adityag@linux.ibm.com" , "songshuaishuai@tinylab.org" , "takakura@valinux.co.jp" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linuxppc-dev@lists.ozlabs.org" , "linux-riscv@lists.infradead.org" , "kexec@lists.infradead.org" , Marc Zyngier CC: "Chocron, Jonathan" Subject: RE: [PATCH v4 1/2] kexec: Consolidate machine_kexec_mask_interrupts() implementation Thread-Topic: [PATCH v4 1/2] kexec: Consolidate machine_kexec_mask_interrupts() implementation Thread-Index: AdtDYtCFjQWQn9I6QGW+NnB/V7SCxQ== Date: Sat, 30 Nov 2024 20:08:44 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.85.143.175] MIME-Version: 1.0 X-Bad-Reply: 'Re:' in Subject but no References or In-Reply-To headers X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241130_120857_309280_64859C35 X-CRM114-Status: GOOD ( 25.16 ) X-Mailman-Approved-At: Mon, 02 Dec 2024 09:07:07 -0800 X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 11/29/2024 3:30 PM, Thomas Gleixner wrote: >> Move the machine_kexec_mask_interrupts function to a common location in >> kernel/kexec_core.c, removing duplicate implementations from architecture >> specific files (arch/arm, arch/arm64, arch/powerpc, and arch/riscv). > > Can you please move this into kernel/irq/kexec.c? > > It's pure interrupt core internal code and there is no point to make > core internal functions visible to random other code just because. Done (in v5 series) >> +void machine_kexec_mask_interrupts(void) >> +{ >> + unsigned int i; >> + struct irq_desc *desc; > > struct irq_desc *desc; > unsigned int i; > > please Done (in v5 series) >> + for_each_irq_desc(i, desc) { >> + struct irq_chip *chip; >> + int check_eoi = 1; >> + >> + chip = irq_desc_get_chip(desc); >> + if (!chip) >> + continue; >> + >> + if (IS_ENABLED(CONFIG_ARM64)) { > > This should not be CONFIG_ARM64. Add something like: > > config GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD > bool > > and select this from ARM64? Done (in v5 series) >> + /* >> + * First try to remove the active state. If this fails, try to EOI the >> + * interrupt. > > This comment does not really explain what this is about. I know you > copied it from the ARM64 implementation, but it should explain what this > actually means. Something like: > > First try to remove the active state from an interrupt which is > forwarded to a VM. If the interrupt is not forwarded, try to > EOI the interrupt. > > or something like that. Done (in v5 series) >> + */ >> + check_eoi = irq_set_irqchip_state(i, IRQCHIP_STATE_ACTIVE, false); > > Looking deeper. This function actually cannot be called from this > context. It does: > > irq_get_desc_buslock(irq, &flags, 0); > > which means for any interrupt which has an actual buslock implementation > it will end up in a sleepable function and deadlock in the worst case. > > Marc? I will wait for Marc's response regarding this issue. Regardless, if any changes are required, I believe it would be better to address them in a separate patch, as this behavior existed before my modification. Thanks, Eliav _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv