From: Hal Feng <hal.feng@starfivetech.com>
To: Conor Dooley <conor@kernel.org>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Ben Dooks <ben.dooks@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
"Marc Zyngier" <maz@kernel.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v7 00/22] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC
Date: Thu, 6 Apr 2023 15:03:14 +0800 [thread overview]
Message-ID: <ce311dcf-67a5-bf15-d0da-88967baf4ee9@starfivetech.com> (raw)
In-Reply-To: <20230405-wharf-rejoin-5222e5958611@spud>
On Wed, 5 Apr 2023 22:30:45 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> On Sat, 01 Apr 2023 19:19:12 +0800, Hal Feng wrote:
>> This patch series adds basic clock, reset & DT support for StarFive
>> JH7110 SoC.
>>
>> @Stephen and @Conor, I have made this series start with the shared
>> dt-bindings, so it will be easier to merge.
>>
>> @Conor, patch 1, 2, 16~21 were already in your branch. Patch 22 is the
>> same with the patch [1] I submitted before, which you had accepted but
>> not merge it into your branch.
>>
>> [...]
>
> Applied to riscv-dt-for-next, thanks!
Thank you so much.
>
> [01/22] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
> https://git.kernel.org/conor/c/7fce1e39f019
> [02/22] dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
> https://git.kernel.org/conor/c/3de0c9103258
>
> These two are shared with clk.
>
> [16/22] dt-bindings: timer: Add StarFive JH7110 clint
> https://git.kernel.org/conor/c/1ff5482ab9a5
> [17/22] dt-bindings: interrupt-controller: Add StarFive JH7110 plic
> https://git.kernel.org/conor/c/8406d19ca049
>
> I took these bindings too, as Palmer has done that in the past for new
> SoC support.
>
> [18/22] dt-bindings: riscv: Add SiFive S7 compatible
> https://git.kernel.org/conor/c/8868caa2a073
> [19/22] riscv: dts: starfive: Add initial StarFive JH7110 device tree
> https://git.kernel.org/conor/c/60bf0a39842e
> [20/22] riscv: dts: starfive: Add StarFive JH7110 pin function definitions
> https://git.kernel.org/conor/c/e22f09e598d1
> [21/22] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
> https://git.kernel.org/conor/c/54baba33392d
> [22/22] riscv: dts: starfive: jh7110: Correct the properties of S7 core
> (squashed)
>
> Hal, can you get your folks to resend whatever dts bits that are now
> applicable? IOW, the dt-bindings for the entries are in a for-next
> branch for some subsystem.
Of course. As far as I know, these nodes include trng / pmu / mmc / qspi.
Best regards,
Hal
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next prev parent reply other threads:[~2023-04-06 7:04 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-01 11:19 [PATCH v7 00/22] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2023-04-01 11:19 ` [PATCH v7 01/22] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng
2023-04-01 11:19 ` [PATCH v7 02/22] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng
2023-04-01 11:19 ` [PATCH v7 03/22] clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE Hal Feng
2023-04-05 11:48 ` Heiko Stübner
2023-04-01 11:19 ` [PATCH v7 04/22] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng
2023-04-01 11:19 ` [PATCH v7 05/22] clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h Hal Feng
2023-04-01 11:19 ` [PATCH v7 06/22] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-04-01 11:19 ` [PATCH v7 07/22] reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE Hal Feng
2023-04-01 11:19 ` [PATCH v7 08/22] reset: Create subdirectory for StarFive drivers Hal Feng
2023-04-01 11:19 ` [PATCH v7 09/22] reset: starfive: Factor out common JH71X0 reset code Hal Feng
2023-04-01 11:19 ` [PATCH v7 10/22] reset: starfive: Extract the " Hal Feng
2023-04-01 11:19 ` [PATCH v7 11/22] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-04-01 11:19 ` [PATCH v7 12/22] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng
2023-04-01 11:19 ` [PATCH v7 13/22] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2023-04-01 11:19 ` [PATCH v7 14/22] clk: starfive: Add StarFive JH7110 always-on " Hal Feng
2023-04-01 11:19 ` [PATCH v7 15/22] reset: starfive: Add StarFive JH7110 reset driver Hal Feng
2023-04-01 11:19 ` [PATCH v7 16/22] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2023-04-01 11:19 ` [PATCH v7 17/22] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2023-04-01 11:19 ` [PATCH v7 18/22] dt-bindings: riscv: Add SiFive S7 compatible Hal Feng
2023-04-01 11:19 ` [PATCH v7 19/22] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2023-05-07 10:03 ` Shengyu Qu
2023-06-01 3:39 ` Hal Feng
2023-04-01 11:19 ` [PATCH v7 20/22] riscv: dts: starfive: Add StarFive JH7110 pin function definitions Hal Feng
2023-04-01 11:19 ` [PATCH v7 21/22] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree Hal Feng
2023-04-04 18:38 ` Shengyu Qu
2023-04-05 1:40 ` Hal Feng
2023-04-01 11:19 ` [PATCH v7 22/22] riscv: dts: starfive: jh7110: Correct the properties of S7 core Hal Feng
2023-04-02 19:19 ` [PATCH v7 00/22] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Conor Dooley
2023-04-03 7:30 ` Hal Feng
2023-04-03 7:47 ` Conor Dooley
2023-04-05 14:40 ` Emil Renner Berthing
2023-04-05 21:30 ` Conor Dooley
2023-04-06 7:03 ` Hal Feng [this message]
2023-04-11 21:35 ` Conor Dooley
2023-04-12 2:12 ` Hal Feng
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