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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Michal Wilczynski <m.wilczynski@samsung.com>,
	mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com,
	guoren@kernel.org, wefu@redhat.com, paul.walmsley@sifive.com,
	palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
	jszhang@kernel.org, p.zabel@pengutronix.de,
	m.szyprowski@samsung.com
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v1 1/4] dt-bindings: clock: thead: Add TH1520 VO clock controller
Date: Mon, 3 Mar 2025 18:41:42 +0100	[thread overview]
Message-ID: <cf6aa8bf-d424-49f4-b6a6-b6b10fd8092f@kernel.org> (raw)
In-Reply-To: <20250303143629.400583-2-m.wilczynski@samsung.com>

On 03/03/2025 15:36, Michal Wilczynski wrote:
> Add device tree bindings for the TH1520 Video Output (VO) subsystem
> clock controller. The VO sub-system manages clock gates for multimedia
> components including HDMI, MIPI, and GPU.
> 
> Document the VIDEO_PLL requirements for the VO clock controller, which
> receives its input from the AP clock controller. The VIDEO_PLL is a
> Silicon Creations Sigma-Delta (integer) PLL typically running at 792 MHz
> with maximum FOUTVCO of 2376 MHz.
> 
> Add a mandatory reset property for the TH1520 VO clock controller that
> handles the GPU clocks. This reset line controls the GPU CLKGEN reset,
> which is required for proper GPU clock operation.
> 
> The reset property is only required for the "thead,th1520-clk-vo"
> compatible, as it specifically handles the GPU-related clocks.
> 
> This binding complements the existing AP sub-system clock controller
> which manages CPU, DPU, GMAC and TEE PLLs.
> 
> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
> ---
>  .../bindings/clock/thead,th1520-clk-ap.yaml   | 33 ++++++++++++++++--
>  .../dt-bindings/clock/thead,th1520-clk-ap.h   | 34 +++++++++++++++++++
>  2 files changed, 64 insertions(+), 3 deletions(-)


Where is the changelog? Why is this v1? There was extensive discussion
for many versions, so does it mean all of it was ignored?

Best regards,
Krzysztof

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  parent reply	other threads:[~2025-03-03 17:42 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20250303143634eucas1p269281f72bdc4d764edd54b9427f68787@eucas1p2.samsung.com>
2025-03-03 14:36 ` [PATCH v1 0/4] Add T-Head TH1520 VO clock support for LicheePi 4A GPU enablement Michal Wilczynski
2025-03-03 14:36   ` [PATCH v1 1/4] dt-bindings: clock: thead: Add TH1520 VO clock controller Michal Wilczynski
2025-03-03 16:24     ` Conor Dooley
2025-03-03 17:41     ` Krzysztof Kozlowski [this message]
2025-03-03 17:46       ` Krzysztof Kozlowski
2025-03-04  7:39         ` Michal Wilczynski
2025-03-04  7:41           ` Krzysztof Kozlowski
2025-03-03 14:36   ` [PATCH v1 2/4] clk: thead: Add clock support for VO subsystem in T-Head TH1520 SoC Michal Wilczynski
2025-03-03 14:36   ` [PATCH v1 3/4] clk: thead: Add support for custom ops in CCU_GATE_CLK_OPS macro Michal Wilczynski
2025-03-03 14:36   ` [PATCH v1 4/4] clk: thead: Add GPU clock gate control with CLKGEN reset support Michal Wilczynski
2025-03-05 23:47     ` Stephen Boyd
2025-03-06 16:43       ` Michal Wilczynski
2025-03-13  9:25         ` Philipp Zabel
2025-03-19  9:22           ` Michal Wilczynski
2025-03-25 22:40             ` Stephen Boyd
2025-03-26 11:24               ` Ulf Hansson
2025-04-01 14:38                 ` Michal Wilczynski
2025-04-07 17:02                   ` Michal Wilczynski
2025-04-08 12:27                     ` Ulf Hansson
2025-03-05  8:18   ` [PATCH v1 0/4] Add T-Head TH1520 VO clock support for LicheePi 4A GPU enablement Michal Wilczynski

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