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Wed, 15 Feb 2023 04:57:09 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.9.0-alpha0-156-g081acc5ed5-fm-20230206.001-g081acc5e Mime-Version: 1.0 Message-Id: In-Reply-To: <20230206201455.1790329-3-evan@rivosinc.com> References: <20230206201455.1790329-1-evan@rivosinc.com> <20230206201455.1790329-3-evan@rivosinc.com> Date: Wed, 15 Feb 2023 10:56:51 +0100 From: "Arnd Bergmann" To: "Evan Green" , "Palmer Dabbelt" Cc: "Conor Dooley" , "Vineet Gupta" , =?UTF-8?Q?Heiko_St=C3=BCbner?= , slewis@rivosinc.com, "Albert Ou" , "Andrew Bresticker" , "Andrew Jones" , "Anup Patel" , "Atish Patra" , "Bagas Sanjaya" , "Celeste Liu" , "Conor.Dooley" , "Dao Lu" , guoren , "Jonathan Corbet" , "Palmer Dabbelt" , "Paul Walmsley" , "Randy Dunlap" , "Ruizhe Pan" , "Sunil V L" , "Tobias Klauser" , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v2 2/6] RISC-V: Add a syscall for HW probing X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230215_015714_404611_83193E3C X-CRM114-Status: GOOD ( 11.50 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Feb 6, 2023, at 21:14, Evan Green wrote: > We don't have enough space for these all in ELF_HWCAP{,2} and there's no > system call that quite does this, so let's just provide an arch-specific > one to probe for hardware capabilities. This currently just provides > m{arch,imp,vendor}id, but with the key-value pairs we can pass more in > the future. > > Co-developed-by: Palmer Dabbelt > Signed-off-by: Palmer Dabbelt > Signed-off-by: Evan Green I'm not sure I understand the problem with AT_HWCAP. While the bits in AT_HWCAP and AT_HWCAP2 are limited, I don't see us running out of new AT_* words to use for additional bits. Presumably the kernel would already have to know about the name of each supported HW feature and could assign a unique bit number to them. Arnd _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv