From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: Andrea Parri <parri.andrea@gmail.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, paulmck@kernel.org, corbet@lwn.net,
mmaas@google.com, hboehm@google.com, striker@us.ibm.com,
charlie@rivosinc.com, rehn@rivosinc.com,
linux-riscv@lists.infradead.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 4/4] membarrier: riscv: Provide core serializing command
Date: Wed, 24 Jan 2024 13:56:39 -0500 [thread overview]
Message-ID: <e4e1ee4d-b96c-47c7-bf81-5f4d3b0ce5dc@efficios.com> (raw)
In-Reply-To: <ZbFahHxi5laA6CbI@andrea>
On 2024-01-24 13:44, Andrea Parri wrote:
>>> +# riscv uses xRET as return from interrupt and to return to user-space.
>>> +#
>>> +# Given that xRET is not core serializing, we rely on FENCE.I for providing
>>> +# core serialization:
>>> +#
>>> +# - by calling sync_core_before_usermode() on return from interrupt (cf.
>>> +# ipi_sync_core()),
>>> +#
>>> +# - via switch_mm() and sync_core_before_usermode() (respectively, for
>>> +# uthread->uthread and kthread->uthread transitions) to go back to
>>> +# user-space.
>>
>> I don't quite get the meaning of the sentence above. There seems to be a
>> missing marker before "to go back".
>
> Let's see. Without the round brackets, the last part becomes:
>
> - via switch_mm() and sync_core_before_usermode() to go back to
> user-space.
>
> This is indeed what I meant to say. What am I missing?
Would it still fit your intent if we say "before returning to
user-space" rather than "to go back to user-space" ?
Because the switch_mm(), for instance, does not happen exactly on
return to user-space, but rather when the scheduler switches tasks.
Therefore, I think that stating that core serialization needs to
happen before returning to user-space is clearer than stating that
it happens "when" we go back to user-space.
Also, on another topic, did you find a way forward with respect of
the different choice of words between the membarrier man page and
documentation vs the RISC-V official semantic with respect to "core
serializing" vs FENCE.I ?
Thanks,
Mathieu
>
> Andrea
--
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com
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next prev parent reply other threads:[~2024-01-24 18:56 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-10 14:55 [PATCH v3 0/4] membarrier: riscv: Core serializing command Andrea Parri
2024-01-10 14:55 ` [PATCH v3 1/4] membarrier: riscv: Add full memory barrier in switch_mm() Andrea Parri
2024-01-10 14:55 ` [PATCH v3 2/4] membarrier: Create Documentation/scheduler/membarrier.rst Andrea Parri
2024-01-10 18:15 ` Randy Dunlap
2024-01-10 19:05 ` Andrea Parri
2024-01-10 19:08 ` Randy Dunlap
2024-01-10 19:19 ` Andrea Parri
2024-01-24 16:13 ` Mathieu Desnoyers
2024-01-10 14:55 ` [PATCH v3 3/4] locking: Introduce prepare_sync_core_cmd() Andrea Parri
2024-01-10 14:55 ` [PATCH v3 4/4] membarrier: riscv: Provide core serializing command Andrea Parri
2024-01-10 19:27 ` Stefan O'Rear
2024-01-10 22:34 ` Andrea Parri
2024-01-24 16:18 ` Mathieu Desnoyers
2024-01-24 18:44 ` Andrea Parri
2024-01-24 18:56 ` Mathieu Desnoyers [this message]
2024-01-24 21:43 ` Andrea Parri
2024-01-24 14:13 ` [PATCH v3 0/4] membarrier: riscv: Core " Andrea Parri
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