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Mon, 07 Aug 2023 02:17:59 -0700 (PDT) Received: from [192.168.1.20] ([178.197.222.113]) by smtp.gmail.com with ESMTPSA id r15-20020adfdc8f000000b00317909f9985sm9893936wrj.113.2023.08.07.02.17.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Aug 2023 02:17:58 -0700 (PDT) Message-ID: Date: Mon, 7 Aug 2023 11:17:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.14.0 Subject: Re: [PATCH v1 2/5] ASoC: dt-bindings: snps,designware-i2s: Add StarFive JH7110 SoC support Content-Language: en-US To: Xingyu Wu , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Maxim Kochetkov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing Cc: Jose Abreu , Paul Walmsley , Palmer Dabbelt , Albert Ou , Walker Chen , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, linux-riscv@lists.infradead.org References: <20230802084301.134122-1-xingyu.wu@starfivetech.com> <20230802084301.134122-3-xingyu.wu@starfivetech.com> <37a636dd-fbd8-d475-8814-e0cc6d5cc812@linaro.org> <12a9bfda-9c9f-6baf-3e5f-ce7cc7d79aee@starfivetech.com> From: Krzysztof Kozlowski In-Reply-To: <12a9bfda-9c9f-6baf-3e5f-ce7cc7d79aee@starfivetech.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230807_021803_286454_BA37805E X-CRM114-Status: GOOD ( 13.82 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 07/08/2023 11:03, Xingyu Wu wrote: >>>> + - if: >>> + properties: >>> + compatible: >>> + contains: >>> + const: snps,designware-i2s >>> + then: >>> + properties: >>> + clocks: >>> + maxItems: 1 >>> + clock-names: >>> + maxItems: 1 >>> + resets: >>> + maxItems: 1 >>> + else: >>> + properties: >>> + resets: >>> + minItems: 2 > > The resets of TX0/TX1/RX on JH7110 SoC are mentioned in 'else' here. Ah, its fine. Clocks seem to be also constrained. > >>> + - if: >>> + properties: >>> + compatible: >>> + contains: >>> + const: starfive,jh7110-i2stx0 >>> + then: >>> + properties: >>> + clocks: >>> + minItems: 5 >> >> Also maxItems > > Will add. > >> >>> + clock-names: >>> + minItems: 5 >> >> Also maxItems > > Will add. > >> >> What about resets? 1 or 2 items? > > Mentioned it in the 'else'. > Or do you mean I should drop the 'else' and add the resets in here? > And is the same for TX1 and RX? It won't be easy to read... probably the binding should be split. Anyway, it's fine as is, except the maxItems above. Best regards, Krzysztof _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv