Re: [PATCH 1/6] mbox: add polarfire soc system controller mailbox

[<Conor.Dooley@microchip.com>]

On 20/11/2020 00:05, Damien Le Moal wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 2020/11/20 2:05, conor.dooley@microchip.com wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> This driver adds support for the single mailbox channel of the MSS
>> system controller on the Microchip PolarFire SoC.
>>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> ---
>>  drivers/mailbox/Kconfig        |  12 ++
>>  drivers/mailbox/Makefile       |   2 +
>>  drivers/mailbox/mailbox-mpfs.c | 296 +++++++++++++++++++++++++++++++++
>>  3 files changed, 310 insertions(+)
>>  create mode 100644 drivers/mailbox/mailbox-mpfs.c
>>
>> diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
>> index 05b1009e2820..4881a519683a 100644
>> --- a/drivers/mailbox/Kconfig
>> +++ b/drivers/mailbox/Kconfig
>> @@ -153,6 +153,18 @@ config MAILBOX_TEST
>>         Test client to help with testing new Controller driver
>>         implementations.
>>
>> +config MPFS_MBOX
>> +     tristate "MPFS Mailbox"
>> +     depends on HAS_IOMEM
> Shouldn't this dependency be on SOC_MICROCHIP_POLARFIRE ?
Not entirely sure what you mean by this one. You want the HAS_IOMEM to be selected by SOC_MICROCHIP_POLARFIRE ?
>
>> +     depends on SOC_MICROCHIP_POLARFIRE
>> +     help
>> +       This driver adds support for the Polarfire SoC mailbox controller.
>> +
>> +       To compile this driver as a module, choose M here. the
>> +       module will be called mailbox-mpfs.
>> +
>> +       If unsure, say Y.
>> +
>>  config QCOM_APCS_IPC
>>       tristate "Qualcomm APCS IPC driver"
>>       depends on ARCH_QCOM || COMPILE_TEST
>> diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
>> index 2e06e02b2e03..63f49b5bcc43 100644
>> --- a/drivers/mailbox/Makefile
>> +++ b/drivers/mailbox/Makefile
>> @@ -39,6 +39,8 @@ obj-$(CONFIG_BCM_PDC_MBOX)  += bcm-pdc-mailbox.o
>>
>>  obj-$(CONFIG_BCM_FLEXRM_MBOX)        += bcm-flexrm-mailbox.o
>>
>> +obj-$(CONFIG_MPFS_MBOX)      += mailbox-mpfs.o
>> +
>>  obj-$(CONFIG_QCOM_APCS_IPC)  += qcom-apcs-ipc-mailbox.o
>>
>>  obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
>> diff --git a/drivers/mailbox/mailbox-mpfs.c b/drivers/mailbox/mailbox-mpfs.c
>> new file mode 100644
>> index 000000000000..686ccd3317f9
>> --- /dev/null
>> +++ b/drivers/mailbox/mailbox-mpfs.c
>> @@ -0,0 +1,296 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Microchip MPFS system controller/mailbox controller driver
>> + *
>> + * Copyright (c) 2020 Microchip Corporation. All rights reserved.
>> + *
>> + * Author: Conor Dooley <conor.dooley@microchip.com>
>> + *
>> + */
>> +
>> +#include <linux/io.h>
>> +#include <linux/err.h>
>> +#include <linux/init.h>
>> +#include <linux/module.h>
>> +#include <linux/kernel.h>
>> +#include <linux/interrupt.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/mailbox_controller.h>
>> +#include <soc/microchip/mpfs.h>
>> +
>> +#define SERVICES_CR_OFFSET                   0x50u
>> +#define SERVICES_SR_OFFSET                   0x54u
>> +#define MAILBOX_REG_OFFSET                   0x800u
>> +#define MSS_SYS_SUCCESS                              0u
trimmed, will address the rest in V2
> -- 
> Damien Le Moal
> Western Digital Research

 

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