From: Andreas Schwab <schwab@suse.de>
To: Nylon Chen <nylon.chen@sifive.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
jszhang@kernel.org, ajones@ventanamicro.com,
aou@eecs.berkeley.edu, palmer@dabbelt.com,
paul.walmsley@sifive.com, greentime.hu@sifive.com,
zong.li@sifive.com, nylon7717@gmail.com
Subject: Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module
Date: Thu, 15 Jun 2023 11:11:49 +0200 [thread overview]
Message-ID: <mvmo7lh2ip6.fsf@suse.de> (raw)
In-Reply-To: <20230615084310.GA780@hsinchu15> (Nylon Chen's message of "Thu, 15 Jun 2023 16:43:11 +0800")
On Jun 15 2023, Nylon Chen wrote:
> Because LLVM currently has it enabled by default(https://reviews.llvm.org/D145164), it will generate this
> relocation type.
>
>>From what I know, GCC will also enable it in the future.
That's why the kernel explicitly disables it.
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
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next prev parent reply other threads:[~2023-06-15 9:12 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-15 7:23 [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module Nylon Chen
2023-06-15 7:36 ` Andreas Schwab
2023-06-15 7:37 ` Conor Dooley
[not found] ` <CAHh=Yk_=oZJ6eY3jJzLavub5rGsvY=MKv4tGXeiqkz+rgJHwDQ@mail.gmail.com>
2023-06-15 8:07 ` Andreas Schwab
2023-06-15 8:11 ` Conor Dooley
2023-06-15 8:43 ` Nylon Chen
2023-06-15 9:11 ` Andreas Schwab [this message]
2023-06-15 9:47 ` Nylon Chen
2023-08-21 7:51 ` Nylon Chen
2023-08-21 8:01 ` Andreas Schwab
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