From: Juhan Jin <juhan.jin@foxmail.com>
To: linux-riscv@lists.infradead.org
Subject: Question about earlier dynamic ftrace implementation with interrupt
Date: Thu, 31 Jul 2025 08:57:58 +0800 [thread overview]
Message-ID: <tencent_73BC0FE5F091AC2E4AFDAB8055DB2007C409@qq.com> (raw)
I was looking at earlier dynamic ftrace implementation which used
stop_machine for text patching, and I have a question about interrupt
occurred between patched instructions.
Let's use commit 6724a76cff85 (riscv: ftrace: Reduce the detour code
size to half, 2023-01-12) as code base. This commit places 2 4-byte
NOPs at the start of each function. These NOPs can be patched to
AUIPC t0, imm and JALR t0, t0(imm) to enable function tracer.
Say we want to enable function tracer for kernel function `func`.
Consider the following scenario:
- Before enabling `func` for function tracer, its first 2 instructions
are NOP and NOP.
- After hart A executes the first NOP at the start of `func`, an
interrupt occurs and hart A handles it.
- While hart A is handling this interrupt, hart B enables function
tracer for `func` and stop_machine is called. IPI to hart A is
pending.
- After hart A handles this interrupt and sret, the pending IPI is
serviced. So instead of executing the second NOP, hart A executes
IPI handler for stop_machine and enter quiescent state.
- Hart B patches the 2 NOPs at the start of `func` to AUIPC and JALR
- Hart A is released from quiescent state and resumes execution.
However, hart A will now execute JALR instead of NOP.
- NOP plus JALR leads to illegal jump target
Is this scenario possible or did I just overlook something?
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next reply other threads:[~2025-07-31 0:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-31 0:57 Juhan Jin [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-07-31 0:57 Question about earlier dynamic ftrace implementation with interrupt Juhan Jin
2025-07-31 2:16 ` Vivian Wang
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