From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04B5DC5516F for ; Sat, 1 Aug 2026 21:05:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bSUybXn46Ga1gQqy33bff3bQxfKE7QKf+2xSAfT2nW4=; b=AorbYnkQJBNU+z rxYDFfBCcl1zwaWS2a93ODBeswwVFpC+zE52suY7PUa8A+kSyKE/DXRPRp/BA28poVD3X/ovlzIB6 T/Eoaqin30ChIg0tsX0owYY/l6buYdNuumpaYuJ7ApD9ChdK6a7HIO2DkrJvDgmRsl0Bicrz9RVo8 rweKwqEutXjukDZgI2OcY9j3i+vM/B1BvBBBhZgdWx2XOQ6s1XICWcudsxFDNkobaQ3K8ujqJV5tg Bx7sA2ieye93Dv5Hp0BAdb72i/dhv/tm8Lv03R7UvggoHdVKybMdkYcIibHPStkr5GhwGoIZ9MKFr M8IvPgtqosoqI/645vfg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wqGtu-0000000F5WO-2mkW; Sat, 01 Aug 2026 21:05:46 +0000 Received: from vps0.lunn.ch ([156.67.10.101]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wqGtq-0000000F5UY-2gfW; Sat, 01 Aug 2026 21:05:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=OzuU/6al2UfdQ5v0OA/wKgoPuo/ckl60pBteNAIG7Bg=; b=cajt7qcbPewc6StlNWT0gPfcpr q1nmIElq44xq5JoRJv2z6hW6LnevssnezFbfyt45BhYJQL/mPv8ejmUUcBMqK1mlF4fqo5BcXomXE g5siVixGy1UBu3H1zIsM2t1ozEzlsdvxC/HTOTWlaoTZmo3N1DzCS/TGNSeBZ5SSQJ5g=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1wqGta-00FQKK-Ny; Sat, 01 Aug 2026 23:05:26 +0200 Date: Sat, 1 Aug 2026 23:05:26 +0200 From: Andrew Lunn To: Coia Prant Cc: Heiko =?iso-8859-1?Q?St=FCbner?= , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue , Lad Prabhakar , Romain Gantois , Heiner Kallweit , Neil Armstrong , Russell King , Shawn Lin , David Heidelberg , netdev@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH v2 05/10] arm64: dts: rockchip: rk3568: add XPCS and fixed-clock nodes Message-ID: <0e9d16df-7332-446b-9321-ce3de3111ffa@lunn.ch> References: <20260801142244.679437-2-coiaprant@gmail.com> <20260801142244.679437-7-coiaprant@gmail.com> <2847036.GUH7pLUipS@diego> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260801_140542_685490_FF794793 X-CRM114-Status: UNSURE ( 5.87 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org > During my tests, I found that the 125 MHz clocks (`xpcs_gmac0_clk` / > `xpcs_gmac1_clk`) are actually outputs of the Naneng Combo PHY > (SerDes) when it's initialized for SGMII/QSGMII mode, rather than > independent board-level oscillators. Do you have documentation for these Combo PHYs? Can these clocks be enabled/disabled? And how is the Combo PHY fed with a clock? Does it have an external oscillator/crystal? Andrew _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip