Re: [PATCH 04/12] pinctrl: rockchip: Add RV1106 pinctrl support

["Heiko Stübner" <heiko@sntech.de>]

Am Montag, 6. Juli 2026, 21:58:00 Mitteleuropäische Sommerzeit schrieb Simon Glass:
> Add pinctrl support for the Rockchip RV1106, taken from the vendor
> kernel in the Luckfox Pico SDK [1] at commit 824b817f8 (a Linux
> 5.10.160 kernel tree). The IOC registers are spread across several
> blocks, addressed through per-bank offsets, with the GPIO0 block in the
> PMU. The drive strength uses the RK3568-style exponential encoding.
> 
> The RV1103 is a package variant of the RV1106 with fewer pins and uses
> the same pin controller.
> 
> [1] https://github.com/LuckfoxTECH/luckfox-pico
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
>  drivers/pinctrl/pinctrl-rockchip.c | 208 +++++++++++++++++++++++++++++
>  drivers/pinctrl/pinctrl-rockchip.h |   1 +
>  2 files changed, 209 insertions(+)
> 
> diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
> index 7e0fcd45fd26..f9cbcb955853 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.c
> +++ b/drivers/pinctrl/pinctrl-rockchip.c

[...]

> @@ -3310,6 +3470,7 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
>  		ret = strength;
>  		goto config;
>  	} else if (ctrl->type == RV1103B ||
> +		   ctrl->type == RV1106 ||
>  		   ctrl->type == RK3506 ||
>  		   ctrl->type == RK3528 ||
>  		   ctrl->type == RK3562 ||
> @@ -3482,6 +3643,7 @@ static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
>  				: PIN_CONFIG_BIAS_DISABLE;
>  	case PX30:
>  	case RV1103B:
> +	case RV1106:
>  	case RV1108:
>  	case RK3188:
>  	case RK3288:
> @@ -3547,6 +3709,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
>  		break;
>  	case PX30:
>  	case RV1103B:
> +	case RV1106:
>  	case RV1108:
>  	case RV1126:
>  	case RK3188:
> @@ -3843,6 +4006,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
>  		return pull ? false : true;
>  	case PX30:
>  	case RV1103B:
> +	case RV1106:
>  	case RV1108:
>  	case RV1126:
>  	case RK3188:
> @@ -4623,6 +4787,48 @@ static struct rockchip_pin_ctrl rv1103b_pin_ctrl __maybe_unused = {
>  	.schmitt_calc_reg	= rv1103b_calc_schmitt_reg_and_bit,
>  };
>  
> +static struct rockchip_pin_bank rv1106_pin_banks[] = {
> +	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0",
> +			     IOMUX_WIDTH_4BIT | IOMUX_SOURCE_PMU,
> +			     IOMUX_WIDTH_4BIT | IOMUX_SOURCE_PMU,
> +			     IOMUX_WIDTH_4BIT | IOMUX_SOURCE_PMU,
> +			     IOMUX_WIDTH_4BIT | IOMUX_SOURCE_PMU),

sashiko is correct here,
only pins 0-6 have drive-strength registers.

Some different setting starts at the 0x30 mark.

This should be easy to handle in rv1106_calc_drv_reg_and_bit()



> +	PIN_BANK_IOMUX_FLAGS_OFFSET(1, 32, "gpio1",
> +				    IOMUX_WIDTH_4BIT,
> +				    IOMUX_WIDTH_4BIT,
> +				    IOMUX_WIDTH_4BIT,
> +				    IOMUX_WIDTH_4BIT,
> +				    0, 0x08, 0x10, 0x18),
> +	PIN_BANK_IOMUX_FLAGS_OFFSET(2, 32, "gpio2",
> +				    IOMUX_WIDTH_4BIT,
> +				    IOMUX_WIDTH_4BIT,
> +				    IOMUX_WIDTH_4BIT,
> +				    IOMUX_WIDTH_4BIT,
> +				    0x10020, 0x10028, 0, 0),

in theory only the first offset should be necessary here - same for the
other bank's offsets.

For offset-values of 0, the driver will automatically create the right,
offset increments. 8 for 4bit wide iomuxes.

See
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pinctrl/pinctrl-rockchip.c#n4344


So with the drive-strength thing fixed
Reviewed-by: Heiko Stuebner <heiko@sntech.de>


Heiko



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