From: Yakir Yang <ykk@rock-chips.com>
To: David Airlie <airlied@linux.ie>,
Thierry Reding <treding@nvidia.com>,
Jingoo Han <jingoohan1@gmail.com>, Mark Yao <yzq@rock-chips.com>,
Heiko Stuebner <heiko@sntech.de>,
Rob Herring <robh+dt@kernel.org>
Cc: Inki Dae <inki.dae@samsung.com>,
Krzysztof Kozlowski <k.kozlowski@samsung.com>,
emil.l.velikov@gmail.com,
Dan Carpenter <dan.carpenter@oracle.com>,
Yakir Yang <ykk@rock-chips.com>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-samsung-soc@vger.kernel.org,
linux-rockchip@lists.infradead.org
Subject: [PATCH v1 4/8] drm: bridge: analogix_dp: correct the register bit define error in ANALOGIX_DP_PLL_REG_1
Date: Mon, 25 Apr 2016 19:34:23 +0800 [thread overview]
Message-ID: <1461584063-6162-1-git-send-email-ykk@rock-chips.com> (raw)
In-Reply-To: <1461583748-5777-1-git-send-email-ykk@rock-chips.com>
There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced
by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special
registers setting").
The PHY PLL input clock source is selected by ANALOGIX_DP_PLL_REG_1
BIT 0, not BIT 1.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 337912b..88d56ad 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -163,8 +163,8 @@
#define HSYNC_POLARITY_CFG (0x1 << 0)
/* ANALOGIX_DP_PLL_REG_1 */
-#define REF_CLK_24M (0x1 << 1)
-#define REF_CLK_27M (0x0 << 1)
+#define REF_CLK_24M (0x1 << 0)
+#define REF_CLK_27M (0x0 << 0)
/* ANALOGIX_DP_LANE_MAP */
#define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6)
--
1.9.1
next prev parent reply other threads:[~2016-04-25 11:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-25 11:29 [PATCH v1 0/8] Add RK3399 eDP support and fix some bugs to analogix_dp driver Yakir Yang
2016-04-25 11:32 ` [PATCH v1 1/8] drm: bridge: analogix_dp: rename RK3288_DP to ROCKCHIP_DP Yakir Yang
2016-04-25 11:34 ` [PATCH v1 2/8] drm: rockchip: analogix_dp: split the lcdc select setting into device data Yakir Yang
[not found] ` <1461583748-5777-1-git-send-email-ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-04-25 11:34 ` [PATCH v1 3/8] drm/rockchip: analogix_dp: add rk3399 eDP support Yakir Yang
2016-04-25 11:34 ` Yakir Yang [this message]
2016-04-25 11:34 ` [PATCH v1 5/8] drm/rockchip: analogix_dp: make panel detect to an optional action Yakir Yang
2016-04-25 11:36 ` [PATCH v1 6/8] drm/bridge: analogix_dp: introduce connector mode_valid callback to plat driver Yakir Yang
2016-04-25 11:38 ` [PATCH v1 7/8] drm: rockchip: analogix_dp: correct the connector display color format and bpc Yakir Yang
2016-04-25 11:40 ` [PATCH v1 8/8] drm: bridge: analogix/dp: fix no drm hpd event when panel plug in Yakir Yang
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