From: Chris Zhong <zyw@rock-chips.com>
To: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de,
yzq@rock-chips.com
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-rockchip@lists.infradead.org,
Rob Herring <robh+dt@kernel.org>,
Kumar Gala <galak@codeaurora.org>,
Chris Zhong <zyw@rock-chips.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/7] dt-bindings: add rk3399 support for dw-mipi-rockchip
Date: Fri, 8 Jul 2016 17:04:55 +0800 [thread overview]
Message-ID: <1467968701-15620-2-git-send-email-zyw@rock-chips.com> (raw)
In-Reply-To: <1467968701-15620-1-git-send-email-zyw@rock-chips.com>
The dw-mipi-dsi of rk3399 is almost the same as rk3288, the rk3399 has
additional phy config clock.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
.../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt
index 1753f0c..4d59df3 100644
--- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt
@@ -5,6 +5,7 @@ Required properties:
- #address-cells: Should be <1>.
- #size-cells: Should be <0>.
- compatible: "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi".
+ "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi".
- reg: Represent the physical address range of the controller.
- interrupts: Represent the controller's interrupt to the CPU(s).
- clocks, clock-names: Phandles to the controller's pll reference
@@ -13,6 +14,10 @@ Required properties:
- ports: contain a port node with endpoint definitions as defined in [2].
For vopb,set the reg = <0> and set the reg = <1> for vopl.
+Optional properties:
+- clocks, clock-names: phandle to the dw-mipi phy clock, name should be
+ "phy_cfg".
+
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
[2] Documentation/devicetree/bindings/media/video-interfaces.txt
--
2.6.3
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next prev parent reply other threads:[~2016-07-08 9:04 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-08 9:04 [PATCH 0/7] Rockchip dw-mipi-dsi driver Chris Zhong
2016-07-08 9:04 ` Chris Zhong [this message]
2016-07-13 13:49 ` [PATCH 1/7] dt-bindings: add rk3399 support for dw-mipi-rockchip Rob Herring
2016-07-08 9:04 ` [PATCH 2/7] DRM: mipi: support rk3399 mipi dsi Chris Zhong
2016-07-08 9:04 ` [PATCH 3/7] dt-bindings: add power domain node for dw-mipi-rockchip Chris Zhong
2016-07-13 13:50 ` Rob Herring
2016-07-08 9:04 ` [PATCH 4/7] drm/rockchip: dw-mipi: add dw-mipi power domain support Chris Zhong
2016-07-08 9:04 ` [PATCH 5/7] drm/rockchip: dw-mipi: support HPD poll Chris Zhong
[not found] ` <1467968701-15620-6-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-08 13:52 ` John Keeping
2016-07-11 0:46 ` Mark yao
2016-07-11 9:20 ` John Keeping
2016-07-08 9:05 ` [PATCH 6/7] drm/rockchip: dw-mipi: fix phy clk lane stop state timeout Chris Zhong
2016-07-08 9:05 ` [PATCH 7/7] drm/rockchip: dw-mipi: fix insufficient bandwidth of some panel Chris Zhong
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