From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shawn Lin Subject: [PATCH 2/2] ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal Date: Mon, 10 Oct 2016 20:33:46 +0800 Message-ID: <1476102826-7143-2-git-send-email-shawn.lin@rock-chips.com> References: <1476102826-7143-1-git-send-email-shawn.lin@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1476102826-7143-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Heiko Stuebner Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Shawn Lin List-Id: linux-rockchip.vger.kernel.org Enable these two modes to speed up the booting and improve the performance. Signed-off-by: Shawn Lin --- arch/arm/boot/dts/rk3288-popmetal.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts b/arch/arm/boot/dts/rk3288-popmetal.dts index 3831cd5..7500e98 100644 --- a/arch/arm/boot/dts/rk3288-popmetal.dts +++ b/arch/arm/boot/dts/rk3288-popmetal.dts @@ -148,6 +148,8 @@ cap-mmc-highspeed; disable-wp; non-removable; + mmc-ddr-1_8v; + mmc-hs200-1_8v; num-slots = <1>; pinctrl-names = "default"; pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; -- 2.3.7