From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A3E52C36005 for ; Mon, 28 Apr 2025 09:51:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cPrthLy9CkHXrmtfILfbwVbPcEGMl4FZsaJcS56RLA8=; b=A9DujpbhKyjN1c uXJxAoxECVxl41jngn2gpdukThihEqAMfxGtTOjxAhGfoIHazCqvEBrHVzhFnlKaAx5oJQcmv9jXi zd1OafQ4YBOo8aAAGc2wayJKVo9IcLgs9sdUloKHyfw3KlOy/OMwjTNQySXdjBpbMbc6xc6NvGKSN tu16LQ2+cMbepFTW4Z2zLQMoEXdQqoGhjWc5MpUotxDPwbSIU0mVDYWmfIhem+XTBWLzSSN801T10 jGhiDecxro8gvO0M3oYqAZrI//OtSa4tWDpoblwqWootaDTWavy4YJK9Jip8eeL/y2uImX1aoHh+I 37n2zuilEqTJ46fQpomw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1u9L8j-00000005imj-0U1B; Mon, 28 Apr 2025 09:51:05 +0000 Received: from bali.collaboradmins.com ([148.251.105.195]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1u9L6j-00000005iQo-0TkG; Mon, 28 Apr 2025 09:49:02 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1745833739; bh=rkVdXMNji/Q8YJWeGD3SoZ7/PCc07CvXWfGHgZMFQ3U=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=bXzdf7wa/jyH7gtQ3uUcudJVVKls0Cyqc2LnVYU5vBYZACepzM9DE4xiN+KYjhlYQ 0PPFQWV6dy/w4b1zyJFyTfrPbnFFeYAcPaSdGBvHIbM6WYHoG3VtuO6RqZNDNgbOCw mPAnsSwIJ9XlYDRLqH5YTIS6Go2EDwJ0oNmCYPlvxu8MV0B9AXraaVlIaAwV0eryGl r9Hc2ijA5xYtXaveGiLEDi09UhR30It37g6ey7DWJlZtZmLiVuireFZUzTGIwNshVW U1/OHDNXHegStr/8KoDL5d3pvnhl/wsUvA4hFSXvACUOIhyUPNK2cGLL16GhG/xwt4 zSY3QpAtseppg== Received: from [IPV6:2a05:1141:1cc:8600:1cd7:9a7e:17d7:cd2c] (unknown [IPv6:2a05:1141:1cc:8600:1cd7:9a7e:17d7:cd2c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: mriesch) by bali.collaboradmins.com (Postfix) with ESMTPSA id 53CDC17E0809; Mon, 28 Apr 2025 11:48:58 +0200 (CEST) Message-ID: <1b3245c1-2a4b-4854-ac2f-e89a52a454ec@collabora.com> Date: Mon, 28 Apr 2025 11:48:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 03/11] media: dt-bindings: media: add bindings for rockchip rk3568 vicap To: Laurent Pinchart Cc: Sakari Ailus , Krzysztof Kozlowski , Mehdi Djait , Maxime Chevallier , =?UTF-8?Q?Th=C3=A9o_Lebrun?= , Gerald Loacker , Thomas Petazzoni , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Fricke , Sebastian Reichel , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org References: <20250306-v6-8-topic-rk3568-vicap-v5-0-f02152534f3c@wolfvision.net> <20250306-v6-8-topic-rk3568-vicap-v5-3-f02152534f3c@wolfvision.net> <20250307-pink-dalmatian-of-kindness-f87ad2@krzk-bin> <4a1e5834-df52-43d2-ab19-e3117840a001@collabora.com> <20250428092232.GC3371@pendragon.ideasonboard.com> Content-Language: en-US From: Michael Riesch In-Reply-To: <20250428092232.GC3371@pendragon.ideasonboard.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250428_024901_326024_9D218A3B X-CRM114-Status: GOOD ( 21.62 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Hi Laurent, On 4/28/25 11:22, Laurent Pinchart wrote: > On Mon, Apr 28, 2025 at 10:11:51AM +0200, Michael Riesch wrote: >> Hi Krzysztof, Sakari, >> >> Thanks for your feedback! Also, sorry for the delayed response, but as >> the e-mail address indicates, there has been a job change in between >> that kept me busy :-) >> >> On 3/7/25 10:49, Sakari Ailus wrote: >>> Hi Krzysztof, Michael, >>> >>> On Fri, Mar 07, 2025 at 08:51:54AM +0100, Krzysztof Kozlowski wrote: >>>> On Thu, Mar 06, 2025 at 05:56:04PM +0100, Michael Riesch wrote: >>>>> Add documentation for the Rockchip RK3568 Video Capture (VICAP) unit. >>>>> >>>>> Signed-off-by: Michael Riesch >>>> >>>> subject: only one media prefix, the first >>>> >>>> A nit, subject: drop second/last, redundant "bindings". The >>>> "dt-bindings" prefix is already stating that these are bindings. >>>> See also: >>>> https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 >> >> Ack. Plain "media: dt-bindings: add rockchip rk3568 vicap" it is, then. >> >>>> >>>>> --- >>>>> .../bindings/media/rockchip,rk3568-vicap.yaml | 169 +++++++++++++++++++++ >>>>> MAINTAINERS | 1 + >>>>> 2 files changed, 170 insertions(+) >>>>> >>>> >>>> ... >>>> >>>>> + clocks: >>>>> + items: >>>>> + - description: ACLK >>>>> + - description: HCLK >>>>> + - description: DCLK >>>>> + - description: ICLK >>>>> + >>>>> + clock-names: >>>>> + items: >>>>> + - const: aclk >>>>> + - const: hclk >>>>> + - const: dclk >>>>> + - const: iclk >>>>> + >>>>> + rockchip,cif-clk-delaynum: >>>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>>> + minimum: 0 >>>>> + maximum: 127 >>>>> + description: >>>>> + Delay the DVP path clock input to align the sampling phase, only valid >>>>> + in dual edge sampling mode. Delay is zero by default and can be adjusted >>>>> + optionally. >>>> >>>> default: 0 >> >> Ack. >> >>> >>> And this is technically specific to the DVP port (0). Should (or could?) it >>> be located there? >> >> "Should"? Yes, makes sense to me. >> "Could"? I guess, as we are referencing port-base here it should be >> feasible. Not an expert opinion, mind you. >> >>> >>>> >>>>> + >>>>> + iommus: >>>>> + maxItems: 1 >>>>> + >>>>> + resets: >>>>> + items: >>>>> + - description: ARST >>>>> + - description: HRST >>>>> + - description: DRST >>>>> + - description: PRST >>>>> + - description: IRST >>>>> + >>>>> + reset-names: >>>>> + items: >>>>> + - const: arst >>>>> + - const: hrst >>>>> + - const: drst >>>>> + - const: prst >>>>> + - const: irst >>>>> + >>>>> + rockchip,grf: >>>>> + $ref: /schemas/types.yaml#/definitions/phandle >>>>> + description: Phandle to general register file used for video input block control. >>>>> + >>>>> + power-domains: >>>>> + maxItems: 1 >>>>> + >>>>> + ports: >>>>> + $ref: /schemas/graph.yaml#/properties/ports >>>>> + >>>>> + properties: >>>>> + port@0: >>>>> + $ref: /schemas/graph.yaml#/$defs/port-base >>>>> + unevaluatedProperties: false >>>>> + description: The digital video port (DVP, a parallel video interface). >>>>> + >>>>> + properties: >>>>> + endpoint: >>>>> + $ref: video-interfaces.yaml# >>>>> + unevaluatedProperties: false >>>>> + >>>>> + properties: >>>>> + bus-type: >>>>> + enum: [5, 6] >>>>> + >>>>> + required: >>>>> + - bus-type >>>>> + >>>>> + port@1: >>>>> + $ref: /schemas/graph.yaml#/properties/port >>>>> + description: Internal port connected to a MIPI CSI-2 host. >>>>> + >>>>> + properties: >>>>> + endpoint: >>>>> + $ref: video-interfaces.yaml# >>>>> + unevaluatedProperties: false >>>> >>>> Hm, does it actually work? graph/port does not allow any other >>>> properties. You should use graph/port-base and probably still narrow >>>> lanes for both of port@0 and port@1. >>> >>> I'd list the relevant properties for both DVP and CSI-2, either as >>> mandatory or with defaults (could be reasonable for DVP signal polarities >>> but not e.g. on number of CSI-2 lanes). >> >> Not sure whether we are on the same page here. As pointed out in the >> last round of feedback >> (https://lore.kernel.org/all/0b19c544-f773-435e-9829-aaaa1c6daf7a@wolfvision.net/), >> port@1 is not MIPI CSI, but some internal interface. >> >> I tried to clarify this by changing the description of this port to >> "Internal port connected to a MIPI CSI-2 host." The host (see >> rockchip,rk3568-mipi-csi.yaml) has a port that is actually MIPI CSI and >> one port that is the other end of port@1 here. > > I'd write "Port connected to the MIPI CSI-2 receiver output". We use > "receiver" instead of "host". Ack. I'll adjust the "host" -> "receiver" wording change in all the other places as well. Regards, Michael > >> As to port@1 here, I am not aware of any properties that can be set. Not >> even very peculiar ones similar to rockchip,cif-clk-delaynum. Should I >> have overlooked something, I think we can relax the constraints, but we >> should start strict, right? >> >>>>> + >>>>> +required: >>>>> + - compatible >>>>> + - reg >>>>> + - interrupts >>>>> + - clocks >>>>> + - ports >>>>> + >>>>> +additionalProperties: false >>>>> + >>>>> +examples: >>>>> + - | >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + >>>>> + parent { >>>> >>>> soc { >> >> Ack. >> >>>>> + #address-cells = <2>; >>>>> + #size-cells = <2>; > _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip