From: Rob Herring <robh@kernel.org>
To: "jianqun.xu" <jay.xu@rock-chips.com>
Cc: heiko@sntech.de, pawel.moll@arm.com, mark.rutland@arm.com,
galak@codeaurora.org, broonie@kernel.org, perex@perex.cz,
tiwai@suse.com, catalin.marinas@arm.com, will.deacon@arm.com,
sboyd@codeaurora.org, linus.walleij@linaro.org,
sjoerd.simons@collabora.co.uk, jwerner@chromium.org,
huangtao@rock-chips.com, linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
dianders@chromium.org, davidriley@chromium.org,
smbarber@chromium.org
Subject: Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf
Date: Tue, 23 Feb 2016 16:15:55 -0600 [thread overview]
Message-ID: <20160223221555.GA7531@rob-hp-laptop> (raw)
In-Reply-To: <1456210864-29037-2-git-send-email-jay.xu@rock-chips.com>
On Tue, Feb 23, 2016 at 03:01:01PM +0800, jianqun.xu wrote:
> From: Jianqun Xu <jay.xu@rock-chips.com>
>
> Add devicetree bindings for Rockchip grf which found on
> Rockchip SoCs.
>
> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
> ---
> changes in v2:
> - add grf.txt (Heiko)
>
> .../devicetree/bindings/soc/rockchip/grf.txt | 35 ++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt
>
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> new file mode 100644
> index 0000000..7fb0410
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> @@ -0,0 +1,35 @@
> +* Rockchip General Register Files (GRF)
> +
> +The general register file will be used to do static set by software, which
> +is composed of many registers for system control.
> +
> +From RK3368 SoCs, the GRF is divided into two sections,
> +- GRF, used for general non-secure system,
> +- PMUGRF, used for always on sysyem
s/sysyem/system/
Otherwise:
Acked-by: Rob Herring <robh@kernel.org>
> +
> +Required Properties:
> +
> +- compatible: GRF should be one of the followings
> + - "rockchip,rk3066-grf", "syscon": for rk3066
> + - "rockchip,rk3188-grf", "syscon": for rk3188
> + - "rockchip,rk3228-grf", "syscon": for rk3228
> + - "rockchip,rk3288-grf", "syscon": for rk3288
> + - "rockchip,rk3368-grf", "syscon": for rk3368
> + - "rockchip,rk3399-grf", "syscon": for rk3399
> +- compatible: PMUGRF should be one of the followings
> + - "rockchip,rk3368-pmugrf", "syscon": for rk3368
> + - "rockchip,rk3399-pmugrf", "syscon": for rk3399
> +- reg: physical base address of the controller and length of memory mapped
> + region.
> +
> +Example: GRF and PMUGRF of RK3399 SoCs
> +
> + pmugrf: syscon@ff320000 {
> + compatible = "rockchip,rk3399-pmugrf", "syscon";
> + reg = <0x0 0xff320000 0x0 0x1000>;
> + };
> +
> + grf: syscon@ff770000 {
> + compatible = "rockchip,rk3399-grf", "syscon";
> + reg = <0x0 0xff770000 0x0 0x10000>;
> + };
> --
> 1.9.1
>
>
next prev parent reply other threads:[~2016-02-23 22:15 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-23 7:01 [PATCH 0/4] Rockchip: rk3399: Add core dtsi for rk3399 jianqun.xu
2016-02-23 7:01 ` [PATCH 3/4] clk: rockchip: add dt-binding header " jianqun.xu
[not found] ` <1456210864-29037-4-git-send-email-jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-02-24 13:27 ` Heiko Stuebner
2016-02-25 0:42 ` Jianqun Xu
[not found] ` <1456210864-29037-1-git-send-email-jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-02-23 7:01 ` [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf jianqun.xu
2016-02-23 22:15 ` Rob Herring [this message]
2016-02-24 0:18 ` Jianqun Xu
2016-02-24 14:35 ` Heiko Stuebner
2016-02-23 7:01 ` [PATCH 2/4] dt-bindings: add bindings for rk3399 clock controller jianqun.xu
[not found] ` <1456210864-29037-3-git-send-email-jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-02-23 22:17 ` Rob Herring
2016-02-23 7:01 ` [PATCH 4/4] ARM64: dts: rockchip: add core dtsi file for rk3399 jianqun.xu
2016-02-26 3:12 ` [PATCH v2 0/3] Rockchip: rk3399: Add core dtsi " Jianqun Xu
[not found] ` <1456456341-14282-1-git-send-email-jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-02-26 3:12 ` [PATCH v2 1/3] dt-bindings: add bindings for rk3399 clock controller Jianqun Xu
2016-02-26 3:12 ` [PATCH v2 2/3] clk: rockchip: add dt-binding header for rk3399 Jianqun Xu
2016-03-01 6:39 ` [PATCH v3 0/3] Rockchip: rk3399: Add core dtsi " Jianqun Xu
[not found] ` <1456814401-10711-1-git-send-email-jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-03-01 6:39 ` [PATCH v3 1/3] dt-bindings: add bindings for rk3399 clock controller Jianqun Xu
2016-03-01 6:40 ` [PATCH v3 2/3] clk: rockchip: add dt-binding header for rk3399 Jianqun Xu
[not found] ` <1456814401-10711-3-git-send-email-jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-03-01 9:19 ` Xing Zheng
2016-03-01 6:40 ` [PATCH v3 3/3] ARM64: dts: rockchip: add core dtsi file " Jianqun Xu
2016-03-31 21:48 ` [PATCH v3 0/3] Rockchip: rk3399: Add core dtsi " Heiko Stuebner
2016-04-01 2:55 ` jay.xu
[not found] ` <56FDE30D.6040008-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-04-01 3:23 ` Heiko Stuebner
2016-04-01 3:50 ` Xing Zheng
2016-02-26 3:12 ` [PATCH v2 3/3] ARM64: dts: rockchip: add core dtsi file " Jianqun Xu
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