From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v4 1/2] Documentation: bindings: add dt documentation for Rockchip PCIe PHY Date: Fri, 29 Jul 2016 16:34:35 -0500 Message-ID: <20160729213435.GA15549@rob-hp-laptop> References: <1469755326-10263-1-git-send-email-shawn.lin@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1469755326-10263-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Shawn Lin Cc: Kishon Vijay Abraham I , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Heiko Stuebner , Doug Anderson , Brian Norris , Wenrui Li , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-rockchip.vger.kernel.org On Fri, Jul 29, 2016 at 09:22:05AM +0800, Shawn Lin wrote: > This patch adds a binding that describes the Rockchip PCIe PHY > found on Rockchip SoCs PCIe interface. > > Signed-off-by: Shawn Lin > > --- > > Changes in v4: None > Changes in v3: > - rename the node to pcie_phy: pcie-phy suggested by Doug > > Changes in v2: > - add clk and reset description > - remove unit-address > > .../devicetree/bindings/phy/rockchip-pcie-phy.txt | 32 ++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt Please add acks when posting new versions. Rob -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html