[PATCH 26/92] ram: rk3399: Add ddrtimingC0

Jagan Teki
2019-06-11T14:50:29Z

Add DdrTimingC0 structure with associated bit fields.

These would help to reconfigure sdram capabilities during
lpddr4 setup related configs.

Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
arch/arm/include/asm/arch-rockchip/sdram_rk3399.h | 12 +++++++++++-
drivers/ram/rockchip/sdram_rk3399.c | 2 +-
2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
index c6a260bad8..924eeb3bac 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
@@ -26,6 +26,16 @@ struct rk3399_ddr_pi_regs {
u32 denali_pi[200];
};

+union noc_ddrtimingc0 {
+ u32 d32;
+ struct {
+ unsigned burstpenalty : 4;
+ unsigned reserved0 : 4;
+ unsigned wrtomwr : 6;
+ unsigned reserved1 : 18;
+ } b;
+};
+
struct rk3399_msch_regs {
u32 coreid;
u32 revisionid;
@@ -44,7 +54,7 @@ struct rk3399_msch_regs {
struct rk3399_msch_timings {
u32 ddrtiminga0;
u32 ddrtimingb0;
- u32 ddrtimingc0;
+ union noc_ddrtimingc0 ddrtimingc0;
u32 devtodev0;
u32 ddrmode;
u32 agingx0;
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 5b87524b7c..f9fec14758 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1043,7 +1043,7 @@ static void dram_all_config(struct dram_info *dram,
&ddr_msch_regs->ddrtiminga0);
writel(noc_timing->ddrtimingb0,
&ddr_msch_regs->ddrtimingb0);
- writel(noc_timing->ddrtimingc0,
+ writel(noc_timing->ddrtimingc0.d32,
&ddr_msch_regs->ddrtimingc0);
writel(noc_timing->devtodev0,
&ddr_msch_regs->devtodev0);
--
2.18.0.321.gffc6fa0e3