From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Subject: [PATCH v2 77/99] ram: rk3399: Update lpddr4 vref based on io settings Date: Mon, 17 Jun 2019 13:02:30 +0530 Message-ID: <20190617073252.27810-78-jagan@amarulasolutions.com> References: <20190617073252.27810-1-jagan@amarulasolutions.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20190617073252.27810-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Simon Glass , Philipp Tomsich , Kever Yang , YouMin Chen , u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, gajjar04akash-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org, Jagan Teki , Manivannan Sadhasivam List-Id: linux-rockchip.vger.kernel.org The vref_mode_dq, vref_value_dq on lpddr4 value is depending on IO settings of rd_vref. Add support for it. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 9eddfa7fd7..24db601072 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -338,7 +338,7 @@ static void set_memory_map(const struct chan_info *chan, u32 channel, } static int phy_io_config(const struct chan_info *chan, - const struct rk3399_sdram_params *params) + const struct rk3399_sdram_params *params, u32 mr5) { u32 *denali_phy = chan->publ->denali_phy; u32 vref_mode_dq, vref_value_dq, vref_mode_ac, vref_value_ac; @@ -349,9 +349,18 @@ static int phy_io_config(const struct chan_info *chan, /* vref setting */ if (params->base.dramtype == LPDDR4) { - /* LPDDR4 */ - vref_mode_dq = 0x6; - vref_value_dq = 0x1f; + struct io_setting *io = lpddr4_get_io_settings(params, mr5); + u32 rd_vref = io->rd_vref * 1000; + + if (rd_vref < 36700) { + /* MODE_LV[2:0] = LPDDR4 (Range 2)*/ + vref_mode_dq = 0x7; + vref_value_dq = (rd_vref - 3300) / 521; + } else { + /* MODE_LV[2:0] = LPDDR4 (Range 1)*/ + vref_mode_dq = 0x6; + vref_value_dq = (rd_vref - 15300) / 521; + } vref_mode_ac = 0x6; vref_value_ac = 0x1f; mode_sel = 0x6; @@ -770,7 +779,7 @@ static void set_ds_odt(const struct chan_info *chan, /* phy_pad_fdbk_term 1bit DENALI_PHY_930 offset_17 */ clrsetbits_le32(&denali_phy[930], 0x1 << 17, reg_value); - phy_io_config(chan, params); + phy_io_config(chan, params, mr5); } static void pctl_start(struct dram_info *dram, u8 channel) -- 2.18.0.321.gffc6fa0e3