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[76.183.134.35]) by smtp.gmail.com with ESMTPSA id q19sm453655oov.18.2021.05.28.13.01.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 May 2021 13:01:09 -0700 (PDT) Date: Fri, 28 May 2021 15:01:07 -0500 From: Chris Morgan To: Michael Walle Cc: linux-mtd@lists.infradead.org, linux-rockchip@lists.infradead.org, andy.yan@rock-chips.com, yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com, tudor.ambarus@microchip.com, p.yadav@ti.com, heiko@sntech.de, robh+dt@kernel.org, vigneshr@ti.com, richard@nod.at, miquel.raynal@bootlin.com, Chris Morgan Subject: Re: [PATCH v2 2/4] spi: rockchip-sfc: Bindings for Rockchip serial flash controller Message-ID: <20210528200107.GA1598@wintermute.localdomain> References: <20210528170020.26219-1-macroalpha82@gmail.com> <20210528170020.26219-3-macroalpha82@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210528_130111_876679_9462FFDA X-CRM114-Status: GOOD ( 29.26 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On Fri, May 28, 2021 at 08:48:29PM +0200, Michael Walle wrote: > Am 2021-05-28 19:00, schrieb Chris Morgan: > > From: Chris Morgan > > > > Add binding document for the Rockchip serial flash controller. > > New device specific parameter of rockchip,sfc-no-dma included in > > documentation. > > > > Signed-off-by: Chris Morgan > > The subject for this patch should start with "dt-bindings:". See > Documentation/devicetree/bindings/submitting-patches.rst Acknowledged. When I do v3 I'll make this change. > > > > --- > > .../spi/rockchip,serialflash-controller.yaml | 107 ++++++++++++++++++ > > 1 file changed, 107 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/spi/rockchip,serialflash-controller.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/spi/rockchip,serialflash-controller.yaml > > b/Documentation/devicetree/bindings/spi/rockchip,serialflash-controller.yaml > > new file mode 100644 > > index 000000000000..eb073130e82a > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/spi/rockchip,serialflash-controller.yaml > > @@ -0,0 +1,107 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > http://devicetree.org/schemas/spi/rockchip,serialflash-controller.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Rockchip SoCs Serial FLASH Controller (SFC) > > + > > +maintainers: > > + - Andy Yan > > + > > +allOf: > > + - $ref: spi-controller.yaml# > > + > > +properties: > > + compatible: > > + oneOf: > > + - const: rockchip,px30-sfc > > + - const: rockchip,rv1108-sfc > > + - items: > > + - const: rockchip,sfc > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + clocks: > > + minItems: 2 > > + items: > > + - description: Module Clock > > + - description: Bus Clock > > + > > + clock-names: > > + minItems: 2 > > + items: > > + - const: clk-sfc > > + - const: clk-hsfc > > + > > + power-domains: > > + maxItems: 1 > > + > > + rockchip,sfc-no-dma: > > + - descrption: Boolean value for disabling DMA > > + > > +patternProperties: > > + "^spi-nor@[0-3]$": > > I guess this subnode shouldn't be here, because its alread being taken > care of by the spi-controller.yaml. Okay, will remove it from v3. > > > + type: object > > + properties: > > + reg: > > + minimum: 0 > > + maximum: 3 > > + > > + spi-max-frequency: > > + maxItems: 1 > > + - description: Maximum frequency for SPI Flash > > + > > + compatible: > > + oneOf: > > + - const: jedec,spi-nor > > + > > + spi-rx-bus-width: > > + maxItems: 1 > > + - description: RX Bus Width (1x, 2x, or 4x mode) > > + > > + spi-tx-bus-width: > > + maxItems: 1 > > + - description: TX Bus Width (1x, 2x, or 4x mode) > > + > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - clocks > > + - clock-names > > + > > +unevaluatedProperties: false > > + > > +examples: > > + - | > > + #include > > + #include > > + > > +sfc: spi@ff3a0000 { > > + compatible = "rockchip,px30-sfc","rockchip,sfc"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + reg = <0x0 0xff3a0000 0x0 0x4000>; > > + interrupts = ; > > + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; > > + clock-names = "sfc", "hsfc"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>; > > + power-domains = <&power PX30_PD_MMC_NAND>; > > + > > + nor_flash: spi-nor@0 { > flash@0 and the reference could probably be dropped. > > > + reg = <0>; > > + compatible = "xtx,xt25f128b","jedec,spi-nor"; > > This should only be only "jedec,spi-nor". > > You can check the schema with dt_bindings_check, see > Documentation/devicetree/bindings/writing-schema.rst > > Otherwise, Rob's bot will likely complain. > > Please note, that these review comments are just the obvious > ones and I don't have much experience with the schemas. Eg. > the compatible looks fishy, too. But I'm not sure. > > -michael > You are correct, I forgot to remove this before I submitted it. I put the full chip name in there while I was working on this. When I send v3 (which will come after the main SPI driver has had a chance to be looked at) I'll make these changes too. Thank you. > > + spi-rx-bus-width = <2>; > > + spi-tx-bus-width = <2>; > > + spi-max-frequency = <108000000>; > > + }; > > +}; > > + > > +... _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip