Re: [PATCH] pinctrl/rockchip: re-fix RK3308 pinmux bits

From: Luca Ceresoli <luca.ceresoli@bootlin.com>
To: "jay.xu@rock-chips.com" <jay.xu@rock-chips.com>
Cc: "Heiko Stübner" <heiko@sntech.de>,
	"linus.walleij" <linus.walleij@linaro.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	杨凯 <kever.yang@rock-chips.com>
Subject: Re: [PATCH] pinctrl/rockchip: re-fix RK3308 pinmux bits
Date: Mon, 17 Oct 2022 15:51:26 +0200	[thread overview]
Message-ID: <20221017155126.024c9c0d@booty> (raw)
In-Reply-To: <20221010160440.18038c10@booty>

Hello jay.xu, kever,

On Mon, 10 Oct 2022 16:04:39 +0200
Luca Ceresoli <luca.ceresoli@bootlin.com> wrote:

> Hello jay.xu, kever,
> 
> On Sun, 2 Oct 2022 09:44:02 +0800
> "jay.xu@rock-chips.com" <jay.xu@rock-chips.com> wrote:
> 
> > Hi Luca：
> > 
> > --------------
> > jay.xu@rock-chips.com
> > >Hello Jianqun,
> > >
> > >Il giorno Sat, 1 Oct 2022 08:42:25 +0800
> > >"jay.xu@rock-chips.com" <jay.xu@rock-chips.com> ha scritto:
> > >  
> > >> Hi Luca:
> > >>
> > >> BR
> > >> --------------
> > >> jay.xu@rock-chips.com  
> > >> >Hello Jianqun Xu,
> > >> >
> > >> >On Fri, 30 Sep 2022 18:26:20 +0800
> > >> >Jianqun Xu <jay.xu@rock-chips.com> wrote:
> > >> >   
> > >> >> Part of pins from RK3308 SoCs have two registers to do pinmux, one is
> > >> >> the origin register with 2bits named by gpioxx_sel, and another with
> > >> >> 3bits and named by gpioxx_sel_plus.   
> > >> >
> > >> >Are the "plus" registers documented anywhere?    
> > >>
> > >> At RK3308 TRM CH5 GRF, 
> > >>
> > >> GRF_SOC_CON13 
> > >>
> > >> 3  RW  0x0 gpio2a2_sel_src_ctrl
> > >>                   IOMUX control source selection.
> > >>                  1'b0: use basic GPIO2A_IOMUX[gpio2a2_sel]
> > >>                  1'b1: use gpio2a2_sel_plus instead of GPIO2A_IOMUX[gpio2a2_sel]
> > >>
> > >> 2:0  RW  0x0 gpio2a2_sel_plus
> > >>                      3'b000: GPIO2_A2
> > >>                      3'b001: UART0_CTSN
> > >>                      3'b010: SPI0_CLK
> > >>                      3'b011: I2C2_SDA
> > >>                      3'b100: Reserved
> > >>                      3'b101: OWIRE_M2
> > >>
> > >> Sorry I don't know about the trm you got from our company, if you cannot find this part,
> > >> may require a new version ?  
> > >
> > >First of all: is a complete TRM available for public download?   
> > 
> > https://opensource.rock-chips.com/wiki_Main_Page
> > @kever should add a trm for rk3308 ?
> 
> Indeed it would be great to have the documentation available in the
> above page! With that one would be able to understand the code, e.g. I
> would have understood on my own what register 0x608/0x610 is and I
> would not have sent my initial patch as is.
> 
> So I subscribe to the proposal by Jay to have the complete TRM online!

While I am still sure that public, complete documentation is the best
for the benefit of Linux support, from the lack of feedback I suspect
this is not coming soon.

While we wait for it to happen, I think the best way to move forward is
to at least add a complete list of the possible values for the "plus"
registers in the kernel source code, either in the driver or in
rk3308.dtsi. I consider this the very minimum needed. Without this, the
next developer will also be unable to use SPI or some other feature,
perhaps sending another patch to fix the same issue, breaking it again.

Would you be OK with doing that?

Best regards.
-- 
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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