From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de,
mchehab@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de,
hverkuil@xs4all.nl, nicolas.dufresne@collabora.com,
jernej.skrabec@gmail.com
Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@collabora.com,
Benjamin Gaignard <benjamin.gaignard@collabora.com>
Subject: [PATCH v4 06/12] media: verisilicon: Check AV1 bitstreams bit depth
Date: Tue, 14 Feb 2023 15:05:51 +0100 [thread overview]
Message-ID: <20230214140557.537984-7-benjamin.gaignard@collabora.com> (raw)
In-Reply-To: <20230214140557.537984-1-benjamin.gaignard@collabora.com>
The driver supports 8 and 10 bits bitstreams, make sure to discard
other cases.
It could happens that userland test if V4L2_CID_STATELESS_AV1_SEQUENCE
exists without setting bit_depth field in this case use
HANTRO_DEFAULT_BIT_DEPTH value.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
version 4:
- This patch is the result of squashing "Save bit depth for AV1 decoder"
and "Check AV1 bitstreams bit depth" of version 3 + adapation to
"[PATCH v8 0/6] media: verisilicon: HEVC: fix 10bits handling" series.
.../media/platform/verisilicon/hantro_drv.c | 36 +++++++++++++++++++
.../media/platform/verisilicon/hantro_v4l2.c | 4 +++
2 files changed, 40 insertions(+)
diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
index bc1a85456142..666cd46902da 100644
--- a/drivers/media/platform/verisilicon/hantro_drv.c
+++ b/drivers/media/platform/verisilicon/hantro_drv.c
@@ -275,7 +275,13 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
/* We only support profile 0 */
if (dec_params->profile != 0)
return -EINVAL;
+ } else if (ctrl->id == V4L2_CID_STATELESS_AV1_SEQUENCE) {
+ const struct v4l2_ctrl_av1_sequence *sequence = ctrl->p_new.p_av1_sequence;
+
+ if (sequence->bit_depth != 8 && sequence->bit_depth != 10)
+ return -EINVAL;
}
+
return 0;
}
@@ -348,6 +354,30 @@ static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl)
return 0;
}
+static int hantro_av1_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct hantro_ctx *ctx;
+
+ ctx = container_of(ctrl->handler,
+ struct hantro_ctx, ctrl_handler);
+
+ switch (ctrl->id) {
+ case V4L2_CID_STATELESS_AV1_SEQUENCE:
+ {
+ int bit_depth = ctrl->p_new.p_av1_sequence->bit_depth;
+
+ if (ctx->bit_depth == bit_depth)
+ return 0;
+
+ return hantro_reset_raw_fmt(ctx, bit_depth);
+ }
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static const struct v4l2_ctrl_ops hantro_ctrl_ops = {
.try_ctrl = hantro_try_ctrl,
};
@@ -365,6 +395,11 @@ static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = {
.s_ctrl = hantro_hevc_s_ctrl,
};
+static const struct v4l2_ctrl_ops hantro_av1_ctrl_ops = {
+ .try_ctrl = hantro_try_ctrl,
+ .s_ctrl = hantro_av1_s_ctrl,
+};
+
#define HANTRO_JPEG_ACTIVE_MARKERS (V4L2_JPEG_ACTIVE_MARKER_APP0 | \
V4L2_JPEG_ACTIVE_MARKER_COM | \
V4L2_JPEG_ACTIVE_MARKER_DQT | \
@@ -542,6 +577,7 @@ static const struct hantro_ctrl controls[] = {
.codec = HANTRO_AV1_DECODER,
.cfg = {
.id = V4L2_CID_STATELESS_AV1_SEQUENCE,
+ .ops = &hantro_av1_ctrl_ops,
},
}, {
.codec = HANTRO_AV1_DECODER,
diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c
index 992c5baa929f..7e74e47c9a89 100644
--- a/drivers/media/platform/verisilicon/hantro_v4l2.c
+++ b/drivers/media/platform/verisilicon/hantro_v4l2.c
@@ -86,6 +86,10 @@ hantro_check_depth_match(const struct hantro_fmt *fmt, int bit_depth)
if (!fmt->match_depth && !fmt->postprocessed)
return true;
+ /* 0 means default depth, which is 8 */
+ if (!bit_depth)
+ bit_depth = HANTRO_DEFAULT_BIT_DEPTH;
+
fmt_depth = hantro_get_format_depth(fmt->fourcc);
/*
--
2.34.1
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next prev parent reply other threads:[~2023-02-14 14:30 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-14 14:05 [PATCH v4 00/12] AV1 stateless decoder for RK3588 Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 01/12] dt-bindings: media: rockchip-vpu: Add rk3588 vpu compatible Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 02/12] v4l2-common: Add support for fractional bpp Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 03/12] media: Add NV12_10LE40_4L4 pixel format Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 04/12] media: verisilicon: Get bit depth for V4L2_PIX_FMT_NV12_10LE40_4L4 Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 05/12] media: verisilicon: Add AV1 decoder mode and controls Benjamin Gaignard
2023-02-14 14:05 ` Benjamin Gaignard [this message]
2023-02-18 13:11 ` [PATCH v4 06/12] media: verisilicon: Check AV1 bitstreams bit depth Ezequiel Garcia
2023-02-20 16:24 ` Benjamin Gaignard
2023-02-20 19:00 ` Nicolas Dufresne
2023-02-21 8:18 ` Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 07/12] media: verisilicon: Compute motion vectors size for AV1 frames Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 08/12] media: verisilicon: Add AV1 entropy helpers Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 09/12] media: verisilicon: Add Rockchip AV1 decoder Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 10/12] media: verisilicon: Add film grain feature to AV1 driver Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 11/12] media: verisilicon: Enable AV1 decoder on rk3588 Benjamin Gaignard
2023-02-14 14:05 ` [PATCH v4 12/12] media: verisilicon: Conditionally ignore native formats Benjamin Gaignard
2023-02-18 13:16 ` [PATCH v4 00/12] AV1 stateless decoder for RK3588 Ezequiel Garcia
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