[PATCH 3/3] arm64: dts: rockchip: Add rkvdec2 Video Decoder on rk3588(s)

Detlev Casanova
2024-06-15T03:04:25Z

Add the rkvdec2 Video Decoder to the RK3588s devicetree.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
.../boot/dts/rockchip/rk3588-rock-5b.dts | 4 ++++
.../boot/dts/rockchip/rk3588s-orangepi-5.dts | 4 ++++
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 19 +++++++++++++++++++
3 files changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
index c551b676860c..965322c24a65 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -503,6 +503,10 @@ &pwm1 {
status = "okay";
};

+&rkvdec0 {
+ status = "okay";
+};
+
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
index feea6b20a6bf..2828fb4c182a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
@@ -321,6 +321,10 @@ typec5v_pwren: typec5v-pwren {
};
};

+&rkvdec0 {
+ status = "okay";
+};
+
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 0fecbf46e127..09672636dcea 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -3034,6 +3034,9 @@ system_sram2: sram@ff001000 {
ranges = <0x0 0x0 0xff001000 0xef000>;
#address-cells = <1>;
#size-cells = <1>;
+ rkvdec0_sram: rkvdec-sram@0 {
+ reg = <0x0 0x78000>;
+ };
};

pinctrl: pinctrl {
@@ -3103,6 +3106,22 @@ gpio4: gpio@fec50000 {
#interrupt-cells = <2>;
};
};
+
+ rkvdec0: video-decoder@fdc38100 {
+ compatible = "rockchip,rk3588-vdec2";
+ reg = <0x0 0xfdc38100 0x0 0x500>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_RKVDEC0>, <&cru HCLK_RKVDEC0>, <&cru CLK_RKVDEC0_CORE>,
+ <&cru CLK_RKVDEC0_CA>, <&cru CLK_RKVDEC0_HEVC_CA>;
+ clock-names = "axi", "ahb", "core",
+ "cabac", "hevc_cabac";
+ assigned-clocks = <&cru ACLK_RKVDEC0>, <&cru CLK_RKVDEC0_CORE>,
+ <&cru CLK_RKVDEC0_CA>, <&cru CLK_RKVDEC0_HEVC_CA>;
+ assigned-clock-rates = <800000000>, <600000000>,
+ <600000000>, <1000000000>;
+ power-domains = <&power RK3588_PD_RKVDEC0>;
+ status = "disabled";
+ };
};

#include "rk3588s-pinctrl.dtsi"
--
2.44.2