From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77319D2F7DE for ; Thu, 17 Oct 2024 01:59:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2Osp5QvL6iTPld235hOqggaRXG/EkoVGSzdRfZrepOQ=; b=28TlTgfVi0XiY8 6E/9uuu8//gIvzSEVSh6QG3isBLupLCOU2PPCL39tIhfHfd6pA5oWiDgAvVYw+RlCiNPfp0habu23 hq2TB81Vq4mYo2Gi3UY3mv/INSZe6p0uOWaeFvt7qlB3hXJHn9H4Y+pl0/tjpz3HuQv1Ys6w/dc1e qtYE0iFGvlXY1C9m2ylcpDTWj16gp8LfPZs6jmY++YRsetdF4V3HNNtSkQRO1EMaH6W30/DwzjfIa cMTyC2DmbrKFZPOYK7ILmcrA2Muw1GHNZtekM4WY0irL/tSs/b7mAiPoiV2LkyE8qoR54NKXZpfhe gS5mxWzhCKu3w3ibhgaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t1FnN-0000000DV1M-0K3f; Thu, 17 Oct 2024 01:59:21 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1FnJ-0000000DUxq-3qR9 for linux-rockchip@bombadil.infradead.org; Thu, 17 Oct 2024 01:59:17 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=LHxYC57e+P/1ywN+H8IsxcbC1laHulkHveI/a17oPEk=; b=oS4LkA9w7ZfzNnvHYYySfqIEY0 bTNrD6zxY4JE6TJ1BSR2mzmBobbtuANa92s+RpNwykXIoMIwpbUXk9VZCKfzATBhem8oD58NWCNIl 1wrS7okclO2gdWr4qnDjKoG70cUrYitfdoDd8INPrUusGVeUZcfD5xcA7m6Nqm1VvBMvStC5Vfb9c D4z68cVCHY/4clcDeIGLsN0XidUzszY5h0lDrfYuVOlojou2kgI7O9M2n9SLYaeVza5qbDIcIyd7W JBpjm2yusQgMwXWnefxPX1b6+EUf4WmncFGN4bwF0JB6D8W3GYxvz2AfVsPZKX+2Jvx4WJa/Bq7nO GMWlFQ/g==; Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1FnG-000000070hd-0Lx4 for linux-rockchip@lists.infradead.org; Thu, 17 Oct 2024 01:59:16 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 94E77A40DE4; Thu, 17 Oct 2024 01:59:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8BEA5C4CECF; Thu, 17 Oct 2024 01:59:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1729130352; bh=tNqaONqagDJFe5C1mHsKPsH8jTRHIn9lXEqjb3NXc4s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ePvbCZ9/+8mHCocUfsTKlLtsQCMNhpCkuYmxm3c5v1G2ZkYbU5ZxEpleH3W1lIehI dFpHob6h8M881fvRpJwac74QHRopu2ZSLACovBRLo2GBzgTnhlYJ/wrr1GlhJ4MOrQ zawwFknY2WxXz5ccQmBWs4UIwfxQzBDhW+cj2TGQg5OOhqfJ9o+tLC0ba6qtZLPgqj +jk3MIR86xMBqY7EYwAzjXZhMWH/TVD6fJRx6jt6n/gJ5uwk37ZX+3ThkGHWtHEDfw xBktD83JOquLzVXDsnxxUQWudTjIhGKqTn0nnRSYPj4Ng5yU9TQ56q4pWC2rCXEN0w nHGHf7a4DgaUw== From: Damien Le Moal To: Manivannan Sadhasivam , Lorenzo Pieralisi , Kishon Vijay Abraham I , Shawn Lin , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , linux-pci@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , devicetree@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, Rick Wertenbroek , Niklas Cassel Subject: [PATCH v5 10/14] PCI: rockchip-ep: Refactor endpoint link training enable Date: Thu, 17 Oct 2024 10:58:45 +0900 Message-ID: <20241017015849.190271-11-dlemoal@kernel.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241017015849.190271-1-dlemoal@kernel.org> References: <20241017015849.190271-1-dlemoal@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241017_025914_546057_32A64D8E X-CRM114-Status: GOOD ( 13.12 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The function rockchip_pcie_init_port() enables link training for a controller configured in EP mode. Enabling link training is again done in rockchip_pcie_ep_probe() after that function executed rockchip_pcie_init_port(). Enabling link training only needs to be done once, and doing so at the probe stage before the controller is actually started by the user serves no purpose. Refactor this by removing the link training enablement from both rockchip_pcie_init_port() and rockchip_pcie_ep_probe() and moving it to the endpoint start operation defined with rockchip_pcie_ep_start(). Enabling the controller configuration using the PCIE_CLIENT_CONF_ENABLE bit in the same PCIE_CLIENT_CONFIG register is also moved to rockchip_pcie_ep_start() and both the controller configuration and link training enable bits are set with a single call to rockchip_pcie_write(). Signed-off-by: Damien Le Moal --- drivers/pci/controller/pcie-rockchip-ep.c | 13 ++++++------- drivers/pci/controller/pcie-rockchip.c | 5 +++-- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c index d980e0b92745..256a90485fe4 100644 --- a/drivers/pci/controller/pcie-rockchip-ep.c +++ b/drivers/pci/controller/pcie-rockchip-ep.c @@ -464,6 +464,12 @@ static int rockchip_pcie_ep_start(struct pci_epc *epc) rockchip_pcie_write(rockchip, cfg, PCIE_CORE_PHY_FUNC_CFG); + /* Enable configuration and start link training */ + rockchip_pcie_write(rockchip, + PCIE_CLIENT_LINK_TRAIN_ENABLE | + PCIE_CLIENT_CONF_ENABLE, + PCIE_CLIENT_CONFIG); + return 0; } @@ -653,16 +659,9 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev) rockchip_pcie_ep_hide_broken_msix_cap(rockchip); - /* Establish the link automatically */ - rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE, - PCIE_CLIENT_CONFIG); - /* Only enable function 0 by default */ rockchip_pcie_write(rockchip, BIT(0), PCIE_CORE_PHY_FUNC_CFG); - rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE, - PCIE_CLIENT_CONFIG); - pci_epc_init_notify(epc); return 0; diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c index c07d7129f1c7..154e78819e6e 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/pcie-rockchip.c @@ -244,11 +244,12 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) rockchip_pcie_write(rockchip, PCIE_CLIENT_GEN_SEL_1, PCIE_CLIENT_CONFIG); - regs = PCIE_CLIENT_LINK_TRAIN_ENABLE | PCIE_CLIENT_ARI_ENABLE | + regs = PCIE_CLIENT_ARI_ENABLE | PCIE_CLIENT_CONF_LANE_NUM(rockchip->lanes); if (rockchip->is_rc) - regs |= PCIE_CLIENT_CONF_ENABLE | PCIE_CLIENT_MODE_RC; + regs |= PCIE_CLIENT_LINK_TRAIN_ENABLE | + PCIE_CLIENT_CONF_ENABLE | PCIE_CLIENT_MODE_RC; else regs |= PCIE_CLIENT_CONF_DISABLE | PCIE_CLIENT_MODE_EP; -- 2.47.0 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip