From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E6E9AC5B552 for ; Tue, 10 Jun 2025 13:49:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:To:In-Reply-To:References:Message-Id: MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YwKy50kxgEwcBDZKGZb+qGRkOgtpxH7bblWvg1FiJx4=; b=hUnv1t2r3pctJX pGWcp0R2iEbq47SHh5F5fPJVjnvc5yBmjBDMvYJS8RLdBPNSajyP7n3aTXqmxEmXROc1MsSkqLZmW upRhSghLFOIu5eJJYdhdkCh1K0KJqaOj3K0PT1uxtXNa3xe9BG7ruJVwHNulRZsSH6NjQAkw0rGVc hIMsv0RjUPme3BALIx8+CdfivMFuO1say8WMmRtmZGOPy8kHID1qJrMPQKAOG00vK9PmiU9bF1w2J quwOWotA5h9lsUwjnUkfHG1NKoTO1RQLS4jiEJStqH2hWxOeF1w9+8fi0u/LlwLySk5oUfb+Av5fw +bA88ot/AgftTDQYfzNQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uOzM6-000000072TY-0DN7; Tue, 10 Jun 2025 13:49:34 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uOyAW-00000006mN1-2CXH; Tue, 10 Jun 2025 12:33:32 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=5xa9cG2pr9xcsVqJ5+MJgpfTILGDJuMoCniM2gaETPk=; b=M0gF9GYYxypTYCJlOPxVhajD1a s0Qf7FkUb80yfYlwRrLC6pOwjGoT4y8xbBjIDCMCx6peiwgY2c3/KCyawxvdvz20HbzQrC89v2S33 I8l/6w/BDdQEZAFICKxNq4yAc190J+AbB9FnPrjhbFcad0bW485mryiPnFHoeaBoWwFedVqJWRoxO iljI8GWsVvs2Zy1+j2Gnl/gd0bfhh3lIHWamKU8Y5NJ4GAuOCYcDEYcAKrDfxkjKGpFJWsgMlaGoo zktlv3BrJOqnBBGCjcloWir9pUq/yKGnTvgTmDUlUhUSUsFvnQPCfk6n5p4CfvmKcYdrFUejpZpMb zuECbq9Q==; Received: from sender4-pp-f112.zoho.com ([136.143.188.112]) by desiato.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uOyAT-00000001oVB-3tFe; Tue, 10 Jun 2025 12:33:32 +0000 ARC-Seal: i=1; a=rsa-sha256; t=1749558793; cv=none; d=zohomail.com; s=zohoarc; b=Al2y6Xk/2fIyGUGuVUgtNCS4FuvbnrttTaj0Ju4xEjHxeWdySFeRLBMijt9dmBceT/dA/sUj3yNBxQo4VeEkPJuFklmghsxOktpv2mF0UdNuJYOXaRTXW7Tg/amVPeWZfR/F+wmVMRhlLhpmiwkdLA9Q2yYXY+qvgO62S9UgowY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1749558793; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=5xa9cG2pr9xcsVqJ5+MJgpfTILGDJuMoCniM2gaETPk=; b=Lg28iP/R8Vq/lCM/6TQCfUq/0H/WfwuO9XDvB91XK2+geaBdZSBpr/zUEtmWKc9GOmfSFThX4bILrkt3oLV5QLm0V0S0yXrNdaMlAMuxFfcEAgPrFsETC6YHEeUA+bHz07XNFTvR4zvxxlsFHDivajCnOky8UWKis7aVhQJ7XIE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1749558793; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=5xa9cG2pr9xcsVqJ5+MJgpfTILGDJuMoCniM2gaETPk=; b=QWqZ9N+YfRkbqawl2keGrpie2ot7FK+6NkViICPeurJwFaV0v4cOuJhmQ61hQU9a wgZbu6XJ1NbQi/tBq1G8pmkLbKtrXylHg/8/1Ux1Q9nnCjl1PjeeSzRozAsvpNkWl40 nQ+1qG8rOr+e2sTccFcdWSvyEE/Fpw1xXuOL3thk= Received: by mx.zohomail.com with SMTPS id 1749558793003641.3987740980031; Tue, 10 Jun 2025 05:33:13 -0700 (PDT) From: Nicolas Frattaroli Date: Tue, 10 Jun 2025 14:32:42 +0200 Subject: [PATCH v6 6/7] arm64: dts: rockchip: Add thermal nodes to RK3576 MIME-Version: 1.0 Message-Id: <20250610-rk3576-tsadc-upstream-v6-6-b6e9efbf1015@collabora.com> References: <20250610-rk3576-tsadc-upstream-v6-0-b6e9efbf1015@collabora.com> In-Reply-To: <20250610-rk3576-tsadc-upstream-v6-0-b6e9efbf1015@collabora.com> To: Alexey Charkov , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Jonas Karlman X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250610_133330_329989_6B998309 X-CRM114-Status: GOOD ( 14.27 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Sebastian Reichel , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, kernel@collabora.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add the TSADC node to the RK3576. Additionally, add everything the TSADC needs to function, i.e. thermal zones, their trip points and maps, as well as adjust the CPU cooling-cells property. The polling-delay properties are set to 0 as we do have interrupts for this TSADC on this particular SoC, though the polling-delay-passive properties are set to 100 for the thermal zones that have a passive cooling device, as otherwise the thermal throttling behaviour never unthrottles. Signed-off-by: Nicolas Frattaroli --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 164 ++++++++++++++++++++++++++++++- 1 file changed, 162 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index 1086482f04792325dc4c22fb8ceeb27eef59afe4..dbc527ec60cfac0bbdb881a27d3ff765366be99e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include / { compatible = "rockchip,rk3576"; @@ -113,9 +114,9 @@ cpu_l0: cpu@0 { capacity-dmips-mhz = <485>; clocks = <&scmi_clk SCMI_ARMCLK_L>; operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; dynamic-power-coefficient = <120>; cpu-idle-states = <&CPU_SLEEP>; + #cooling-cells = <2>; }; cpu_l1: cpu@1 { @@ -127,6 +128,7 @@ cpu_l1: cpu@1 { clocks = <&scmi_clk SCMI_ARMCLK_L>; operating-points-v2 = <&cluster0_opp_table>; cpu-idle-states = <&CPU_SLEEP>; + #cooling-cells = <2>; }; cpu_l2: cpu@2 { @@ -138,6 +140,7 @@ cpu_l2: cpu@2 { clocks = <&scmi_clk SCMI_ARMCLK_L>; operating-points-v2 = <&cluster0_opp_table>; cpu-idle-states = <&CPU_SLEEP>; + #cooling-cells = <2>; }; cpu_l3: cpu@3 { @@ -149,6 +152,7 @@ cpu_l3: cpu@3 { clocks = <&scmi_clk SCMI_ARMCLK_L>; operating-points-v2 = <&cluster0_opp_table>; cpu-idle-states = <&CPU_SLEEP>; + #cooling-cells = <2>; }; cpu_b0: cpu@100 { @@ -159,9 +163,9 @@ cpu_b0: cpu@100 { capacity-dmips-mhz = <1024>; clocks = <&scmi_clk SCMI_ARMCLK_B>; operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; dynamic-power-coefficient = <320>; cpu-idle-states = <&CPU_SLEEP>; + #cooling-cells = <2>; }; cpu_b1: cpu@101 { @@ -173,6 +177,7 @@ cpu_b1: cpu@101 { clocks = <&scmi_clk SCMI_ARMCLK_B>; operating-points-v2 = <&cluster1_opp_table>; cpu-idle-states = <&CPU_SLEEP>; + #cooling-cells = <2>; }; cpu_b2: cpu@102 { @@ -184,6 +189,7 @@ cpu_b2: cpu@102 { clocks = <&scmi_clk SCMI_ARMCLK_B>; operating-points-v2 = <&cluster1_opp_table>; cpu-idle-states = <&CPU_SLEEP>; + #cooling-cells = <2>; }; cpu_b3: cpu@103 { @@ -195,6 +201,7 @@ cpu_b3: cpu@103 { clocks = <&scmi_clk SCMI_ARMCLK_B>; operating-points-v2 = <&cluster1_opp_table>; cpu-idle-states = <&CPU_SLEEP>; + #cooling-cells = <2>; }; idle-states { @@ -520,6 +527,143 @@ psci { method = "smc"; }; + thermal_zones: thermal-zones { + /* sensor near the center of the SoC */ + package_thermal: package-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsadc 0>; + + trips { + package_crit: package-crit { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + /* sensor for cluster1 (big Cortex-A72 cores) */ + bigcore_thermal: bigcore-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&tsadc 1>; + + trips { + bigcore_alert: bigcore-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + bigcore_crit: bigcore-crit { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&bigcore_alert>; + cooling-device = + <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + /* sensor for cluster0 (little Cortex-A53 cores) */ + littlecore_thermal: littlecore-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&tsadc 2>; + + trips { + littlecore_alert: littlecore-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + littlecore_crit: littlecore-crit { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&littlecore_alert>; + cooling-device = + <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&tsadc 3>; + + trips { + gpu_alert: gpu-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + gpu_crit: gpu-crit { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&gpu_alert>; + cooling-device = + <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + npu_thermal: npu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsadc 4>; + + trips { + npu_crit: npu-crit { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + ddr_thermal: ddr-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsadc 5>; + + trips { + ddr_crit: ddr-crit { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = , @@ -2285,6 +2429,22 @@ saradc: adc@2ae00000 { status = "disabled"; }; + tsadc: tsadc@2ae70000 { + compatible = "rockchip,rk3576-tsadc"; + reg = <0x0 0x2ae70000 0x0 0x400>; + interrupts = ; + clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + assigned-clocks = <&cru CLK_TSADC>; + assigned-clock-rates = <2000000>; + resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>; + reset-names = "tsadc-apb", "tsadc"; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <120000>; + rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ + }; + i2c9: i2c@2ae80000 { compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c"; reg = <0x0 0x2ae80000 0x0 0x1000>; -- 2.49.0 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip