Re: [PATCH v2 0/4] PCI: dwc: Advertise L1 PM Substates only if driver requests it

From: Bjorn Helgaas <helgaas@kernel.org>
To: Niklas Cassel <cassel@kernel.org>, Shawn Lin <shawn.lin@rock-chips.com>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Kever Yang" <kever.yang@rock-chips.com>,
	"Simon Xue" <xxm@rock-chips.com>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	"Dragan Simic" <dsimic@manjaro.org>,
	"FUKAUMI Naoki" <naoki@radxa.com>,
	"Diederik de Haas" <diederik@cknow-tech.com>,
	"Richard Zhu" <hongxing.zhu@nxp.com>,
	"Frank Li" <Frank.li@nxp.com>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Fabio Estevam" <festevam@gmail.com>,
	"Conor Dooley" <conor@kernel.org>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Hans Zhang" <hans.zhang@cixtech.com>,
	linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, kernel@pengutronix.de,
	"Bjorn Helgaas" <bhelgaas@google.com>
Subject: Re: [PATCH v2 0/4] PCI: dwc: Advertise L1 PM Substates only if driver requests it
Date: Mon, 24 Nov 2025 16:50:30 -0600	[thread overview]
Message-ID: <20251124225030.GA2721839@bhelgaas> (raw)
In-Reply-To: <20251118214312.2598220-1-helgaas@kernel.org>

On Tue, Nov 18, 2025 at 03:42:14PM -0600, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas@google.com>
> 
> This is a follow-up to Niklas's patch at
> https://lore.kernel.org/r/20251017163252.598812-2-cassel@kernel.org.  That
> patch clears the L1 PM Substate Supported bits for the dw-rockchip driver,
> which doesn't yet do the device configuration to support the L1 Substates.
> 
> This series does the same thing, but in the DWC core so it applies to all
> DWC-based drivers.  Drivers that do support L1 Substates (currently
> tegra194 and qcom) indicate that by setting "dw_pcie.l1ss_support", and the
> DWC core will leave the L1 PM Substate Supported bits alone.
> 
> This also includes Shawn's patches to add the dw-rockchip support for L1
> Substates.
> 
> The problem this fixes is that users are currently able to enable L1
> Substates, e.g., by
> 
>   - building with with CONFIG_PCIEASPM_POWER_SUPERSAVE=y
>   - booting with "pcie_aspm.policy=powersupersave"
>   - echo powersupersave > /sys/module/pcie_aspm/parameters/policy
>   - echo 1 > /sys/bus/pci/devices/.../link/l1_1_aspm
> 
> but this breaks devices if the platform doesn't support CLKREQ# or lacks
> Root Port configuration.  This series avoids that problem by preventing the
> kernel from enabling L1.x in the first place.
> 
> 
> Bjorn Helgaas (2):
>   PCI: dwc: Advertise L1 PM Substates only if driver requests it
>   PCI: tegra194: Remove unnecessary L1SS disable code
> 
> Shawn Lin (2):
>   PCI: dw-rockchip: Configure L1SS support
>   arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1

I applied these (except for the arm64: dts: patch) to
pci/controller/dwc, planned for v6.19.  Same as posted here except I
dropped dw_pcie_hide_unsupported_l1ss() from
dw_pcie_ep_init_registers().

>  .../boot/dts/rockchip/rk3588-evb1-v10.dts     |  7 ++-
>  .../pci/controller/dwc/pcie-designware-ep.c   |  2 +
>  .../pci/controller/dwc/pcie-designware-host.c |  2 +
>  drivers/pci/controller/dwc/pcie-designware.c  | 24 ++++++++++
>  drivers/pci/controller/dwc/pcie-designware.h  |  2 +
>  drivers/pci/controller/dwc/pcie-dw-rockchip.c | 40 ++++++++++++++++
>  drivers/pci/controller/dwc/pcie-qcom.c        |  2 +
>  drivers/pci/controller/dwc/pcie-tegra194.c    | 48 ++++---------------
>  8 files changed, 85 insertions(+), 42 deletions(-)
> 
> -- 
> 2.43.0
> 

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