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Thu, 19 Mar 2026 03:18:02 -0700 (PDT) Received: from debian.levillagebyca.com ([213.152.28.84]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f4bb1b38sm71969575e9.3.2026.03.19.03.18.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 03:18:01 -0700 (PDT) From: MidG971 To: shawn.lin@rock-chips.com Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, heiko@sntech.de, jonas@kwiboo.se Subject: Re: [PATCH v2] arm64: dts: rockchip: rock-3b: Model PI6C20100 as gated-fixed-clock Date: Thu, 19 Mar 2026 11:19:11 +0100 Message-Id: <20260319101911.31348-1-midgy971@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: <7008e941-e4b0-a060-1cd7-55070fd5831f@rock-chips.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260319_031804_914548_D244A634 X-CRM114-Status: GOOD ( 11.31 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On 2026/03/04, Shawn Lin wrote: > IIUC, you are using Claude to help generate this patch, please > describe it properly, for example, > > Co-developed-by: Claude claude-opus-4-20250514 [1] > or > Assisted-by: Claude:claude-3-opus [2] > > [1] https://lwn.net/Articles/1031473/ > [2] https://docs.kernel.org/process/coding-assistants.html Thank you for the guidance. I used Claude as a coding assistant and will use the proper tag in v3: Assisted-by: Claude:claude-3-opus Signed-off-by: MidG971 > There is a missing pipe clock which should be fixed. Please > refer to David's patch[3]. > > [3] https://lore.kernel.org/linux-rockchip/d981fa84-bd05-ac9d-98ca-89ee47177829@rock-chips.com/T/#m6a8289609e6a60691d3c06358b6322c7aa5e43d1 Since our board-level &pcie3x2 override replaces the clocks property entirely, v3 adds CLK_PCIE30X2_PIPE_DFT ("pipe") as well, consistent with David's base DTS patch. I tested v3 on the ROCK 3B (kernel 6.19.0-rc5): pcie3x2 probes successfully and the NVMe device is detected at 15.75 Gb/s. The pcie30_refclk clock appears in the clock tree at 100MHz with pcie3x2 as its consumer. One note on the pipe clock test: CLK_PCIE30X2_PIPE_DFT is defined in rk3568-cru.h but was not yet registered in the CRU driver in the tested kernel build, so the pipe clock was excluded from the functional test (pcie3x2 probe fails with -ENOENT at clock index 5 when it is included). The gated-fixed-clock node and ref clock were verified working. I expect the pipe clock will work once the CRU driver registers it alongside David's DTS patch. v3 is sent separately. Best regards, MidG971 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip