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From: Jiaxing Hu <gahing@gahingwoo.com>
To: sidong.yang@furiosa.ai
Cc: tomeu@tomeuvizoso.net, linux-rockchip@lists.infradead.org,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v13 00/14] accel/rocket: RK3576 NPU (RKNN) enablement
Date: Sat, 19 Sep 2026 21:17:15 +1200	[thread overview]
Message-ID: <20260919091715.8933-1-gahing@gahingwoo.com> (raw)
In-Reply-To: <aq41BAp-6P0HMFBB@rock-5b-plus>

Hi Sidong,

It is not private: https://github.com/gahingwoo/charsiu,
GPL-2.0-or-later. It reads a GGUF, quantises the weights to the NPU's
int4 or int8 itself, and submits the matmuls through this driver's uAPI,
with no Mesa and no Rockchip userspace in the path. On a ROCK 4D with
this series applied, Llama-3.2-1B at four bits decodes 17.85 tok/s at
594 MHz, against librkllmrt's 12.85 on the same board and clock. Both
were run here.

It is not the first, though, and the one before it is on your SoC.
gregordinary's rocket-userspace and ggml-rocket drive an RK3588 through
mainline rocket, and rockchip-npu-notes collects the measurements. Worth
reading before anything of mine. Their finding is that the NPU is a
prefill engine and decode belongs on the CPU: "Decode (M=1 GEMV) is
forced to the CPU, ~82x slower on the NPU".

charsiu is not a port of that work, and it runs decode on the NPU, which
is the thing that finding says not to do. On RK3576 the vendor does it
too: 3752 of the convolution dispatches in its own Llama-3.2-1B file are
M=1, and they are the model's projections.

Which is the caveat for you. Your From: says rock-5b-plus, and charsiu
has never run on RK3588. CBUF is 1 MiB there against 384 KiB here, three
cores rather than two, twelve task-number bits rather than sixteen, and
a different weight tile stride. The register encoding and the weight
layout would have to be rewritten. The quantiser and the model frontend
would not.

Regards,
Jiaxing

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  reply	other threads:[~2026-09-19  9:17 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15 10:43 [PATCH v13 00/14] accel/rocket: RK3576 NPU (RKNN) enablement Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 01/14] accel/rocket: request the core clocks by name Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 02/14] accel/rocket: take the completion register writes under job_lock Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 03/14] accel/rocket: wait for a running IRQ handler before resetting a core Jiaxing Hu
2026-09-16 13:28   ` Igor Paunovic
2026-09-19  9:17     ` Jiaxing Hu
2026-09-19 10:34       ` Igor Paunovic
2026-09-15 10:43 ` [PATCH v13 04/14] accel/rocket: let the core suspend after a reset Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 05/14] accel/rocket: factor the completion tail out of the IRQ handler Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 06/14] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 07/14] dt-bindings: power: rockchip: allow resets in a power domain node Jiaxing Hu
2026-09-21 21:52   ` Heiko Stuebner
2026-09-15 10:43 ` [PATCH v13 08/14] dt-bindings: iommu: rockchip: describe the RK3576 NPU MMU Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 09/14] pmdomain: rockchip: add optional per-domain power-on settle delay Jiaxing Hu
2026-09-21 12:41   ` Ulf Hansson
2026-09-21 22:06   ` Heiko Stuebner
2026-09-22  1:28     ` Chaoyi Chen
2026-09-24  9:08     ` Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 10/14] pmdomain: rockchip: cycle optional power-domain resets on power-on Jiaxing Hu
2026-09-21 12:43   ` Ulf Hansson
2026-09-23  9:38   ` Philipp Zabel
2026-09-15 10:43 ` [PATCH v13 11/14] accel/rocket: select the per-core clock and reset counts from match data Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 12/14] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-09-15 10:43 ` [PATCH v13 13/14] arm64: dts: rockchip: add NPU (RKNN) nodes to rk3576 Jiaxing Hu
2026-09-21 21:51   ` Heiko Stuebner
2026-09-15 10:43 ` [PATCH v13 14/14] arm64: dts: rockchip: enable the NPU on rk3576-rock-4d Jiaxing Hu
2026-09-19  7:32 ` [PATCH v13 00/14] accel/rocket: RK3576 NPU (RKNN) enablement Sidong Yang
2026-09-19  9:17   ` Jiaxing Hu [this message]
2026-09-21 12:46 ` Ulf Hansson
2026-09-24  9:08   ` Jiaxing Hu
2026-09-24 13:48     ` Ulf Hansson

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