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X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On Wed, Sep 30, 2026 at 03:00:34AM +0000, sashiko-bot@kernel.org wrote: > Since the user1 button GPIO (RK_PA3) is registered in gpio-keys as > GPIO_ACTIVE_LOW to generate edge interrupts, does disabling the internal pull-up > with &pcfg_pull_none leave the pin floating? Not floating: GPIO0_A3 (USR1_SWITCH#) has an external 4.75k pull-up (R9) to 1V8_S3 on the SoC side of D11, sheet 29 of https://wiki.kobol.io/helios64/files/schematics/Helios64_Schematics_Rev1.2.pdf Armbian ships the same pinctrl; with no User1 button attached the IRQ count stays 0 after 29 minutes of uptime. _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip