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[211.23.39.77]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2e97e882a20sm6971025ad.62.2026.10.16.01.56.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Oct 2026 01:56:58 -0700 (PDT) From: Jason Yang Date: Fri, 16 Oct 2026 16:56:37 +0800 Subject: [PATCH v5 3/8] phy: rockchip-samsung-dcphy: Move block-level setup to runtime resume MIME-Version: 1.0 Message-Id: <20261016-dcphy-rx-v1-v5-3-e63b49eabe2d@gmail.com> References: <20261016-dcphy-rx-v1-v5-0-e63b49eabe2d@gmail.com> In-Reply-To: <20261016-dcphy-rx-v1-v5-0-e63b49eabe2d@gmail.com> To: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Guochun Huang , Philipp Zabel Cc: Michael Riesch , Sebastian Reichel , Bryan O'Donoghue , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jason Yang X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1792141002; l=3359; i=jason98166@gmail.com; s=20260721; h=from:subject:message-id; bh=PaA+7EhfjjyXSykHdMCAcs/0kj/172DSX40sjJai2Vs=; b=hOMpC3DGfbUpIpLLafpPHjqPnGV4sluEAXnjKxw4tpYX/teHfoW6y5UED13eX1vDR6A9Q7kpt me89SI01UkhASRauzk+6cNOCWTsoXBiWJaGuu5kjAWRlBRFI731Q3dH X-Developer-Key: i=jason98166@gmail.com; a=ed25519; pk=xQmD001Q/ooHl39PxyQtusbUQmgbOsSfpFryRVWZ/k4= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261016_015700_558521_C08B3CC9 X-CRM114-Status: GOOD ( 13.94 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The APB reset and the BIAS references have to be treated as block-level [1]: both the transmitter and the receiver need them, and they only have to be programmed once. They are programmed from the transmitter's power-on path today. A later change registers one struct phy for each of them, and a second consumer coming up would then reset the block underneath a PHY that is already running. Program them from runtime resume instead, where whichever of the two comes up first brings the block up and a second one no longer resets it. This puts the BIAS writes ahead of the per-PHY reset assert, where the TRM's worked example has them after [1]. That is safe: neither M_RESETN nor S_RESETN covers the BIAS registers, and the values written are those registers' reset defaults. The output level select in BIAS_CON4 stays on the power-on path: it selects 400mV for D-PHY and 530mV for C-PHY, and the driver core resumes a runtime-PM supplier before the consumer's probe runs, so runtime resume cannot yet know which of the two applies. [1] RK3588 TRM: sections 22.4.1 (address map), 22.4.2 (reset values), 22.6.1.2 (reset) and 22.6.4.1 (D-PHY transmitter start-up) Signed-off-by: Jason Yang --- drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c | 25 ++++++++++++----------- 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c index 7382043e1f31..1471a1563d2a 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c @@ -980,13 +980,6 @@ static void samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy *sams I_LADDER_1_00V); regmap_write(samsung->regmap, BIAS_CON2, REG_325M_325MV | REG_LP_400M_400MV | REG_400M_400MV | REG_645M_645MV); - - /* default output voltage select: - * dphy: 400mv - * cphy: 530mv - */ - regmap_update_bits(samsung->regmap, BIAS_CON4, - I_MUX_SEL_MASK, I_MUX_400MV); } static void samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy *samsung) @@ -1338,7 +1331,13 @@ static int samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung) reset_control_assert(samsung->m_phy_rst); - samsung_mipi_dcphy_bias_block_enable(samsung); + /* default output voltage select: + * dphy: 400mv + * cphy: 530mv + */ + regmap_update_bits(samsung->regmap, BIAS_CON4, + I_MUX_SEL_MASK, I_MUX_400MV); + samsung_mipi_dcphy_pll_configure(samsung); samsung_mipi_dphy_clk_lane_timing_init(samsung); samsung_mipi_dphy_data_lane_timing_init(samsung); @@ -1362,10 +1361,6 @@ static int samsung_mipi_dcphy_power_on(struct phy *phy) { struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy); - reset_control_assert(samsung->apb_rst); - udelay(1); - reset_control_deassert(samsung->apb_rst); - switch (samsung->type) { case PHY_TYPE_DPHY: return samsung_mipi_dphy_power_on(samsung); @@ -1656,6 +1651,12 @@ static __maybe_unused int samsung_mipi_dcphy_runtime_resume(struct device *dev) return ret; } + reset_control_assert(samsung->apb_rst); + udelay(1); + reset_control_deassert(samsung->apb_rst); + + samsung_mipi_dcphy_bias_block_enable(samsung); + return 0; } -- 2.43.0 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip