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Mon, 26 Oct 2026 17:24:28 -0700 (PDT) From: Nikolay Bryskin To: Heiko Stuebner , Stephen Boyd Cc: Brian Masney , Jerome Brunet , linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Nikolay Bryskin Subject: [PATCH] clk: rockchip: rk3588: keep the OTP gates shared with the secure world on Date: Tue, 27 Oct 2026 02:24:19 +0200 Message-ID: <20261027002419.2099708-1-nbryskin@gmail.com> X-Mailer: git-send-email 2.56.0 X-Archived-By: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261026_172431_721305_D70AA637 X-CRM114-Status: GOOD ( 12.01 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The secure OTP controller (OTPC_S) shares three clock gates in CRU_CLKGATE_CON18 with the non-secure one: clk_otpc_arb, clk_otpc_auto_rd_g and clk_otp_phy_g. The kernel treats them as ordinary gates: clk_otpc_auto_rd_g is disabled as unused at the end of boot, and the rockchip-otp nvmem driver enables clk_otpc_arb and clk_otp_phy_g around each read and disables them again afterwards. Firmware in the secure world (OP-TEE reads its hardware unique key and the secure boot state from OTPC_S, and programs them) has no way to take a reference on these clocks. Once Linux has gated them, every secure OTP access times out, and a normal-world nvmem read on another CPU can gate them in the middle of a secure access, including a fuse programming cycle. Mark the three gates critical so the normal world never turns them off. They are 24 MHz gates for the OTP block only. Link: https://github.com/OP-TEE/optee_os/pull/8034 Signed-off-by: Nikolay Bryskin --- drivers/clk/rockchip/clk-rk3588.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3588.c b/drivers/clk/rockchip/clk-rk3588.c index 24baa0ef9bf3..8e0f408fdfad 100644 --- a/drivers/clk/rockchip/clk-rk3588.c +++ b/drivers/clk/rockchip/clk-rk3588.c @@ -1158,11 +1158,11 @@ static struct rockchip_clk_branch rk3588_early_clk_branches[] __initdata = { RK3588_CLKGATE_CON(18), 9, GFLAGS), GATE(CLK_OTPC_NS, "clk_otpc_ns", "xin24m", 0, RK3588_CLKGATE_CON(18), 10, GFLAGS), - GATE(CLK_OTPC_ARB, "clk_otpc_arb", "xin24m", 0, + GATE(CLK_OTPC_ARB, "clk_otpc_arb", "xin24m", CLK_IS_CRITICAL, RK3588_CLKGATE_CON(18), 11, GFLAGS), - GATE(CLK_OTP_PHY_G, "clk_otp_phy_g", "xin24m", 0, + GATE(CLK_OTP_PHY_G, "clk_otp_phy_g", "xin24m", CLK_IS_CRITICAL, RK3588_CLKGATE_CON(18), 13, GFLAGS), - GATE(CLK_OTPC_AUTO_RD_G, "clk_otpc_auto_rd_g", "xin24m", 0, + GATE(CLK_OTPC_AUTO_RD_G, "clk_otpc_auto_rd_g", "xin24m", CLK_IS_CRITICAL, RK3588_CLKGATE_CON(18), 12, GFLAGS), GATE(PCLK_SARADC, "pclk_saradc", "pclk_top_root", 0, -- 2.56.0 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip