From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1E60EC4345F for ; Sun, 14 Apr 2024 07:51:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/vUQpH9PFglwkCB8AhorCcdOllw3XT8++2MlbKoDawc=; b=C5P/Aw99pQS50r cqgvkrgN1Ib2Osra9z/HuUFhL8RpbPkux0bMArFrB0V8GK8vpWa88jySvXJrkdPXpXuk4LCtrqhgO t1ZmuXJgq9gqeKzIWr7Y8ZJr0nkXFh22+LT5on4J6V8a827RktEGPv44sX/mH1ObohZuNmlR+HgvW ZLT+GxYkF3KCZ6SVR4CudJ/0ss2hQLpqv133LFtilaUmz+jgU52QegAR9SwF3EhzY+67V5W0O+rzY AewhRr0K3zcicKYJSzhaKXBxkTh0MfUtZmXom4FpwbUC5bdgYQtot1yu6RlBxUxpu+KVwu3n3dFRE REUSOVxqmL/7Cs+2SDbg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rvudt-00000004wSG-4By6; Sun, 14 Apr 2024 07:51:14 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rvudn-00000004wR1-45PC; Sun, 14 Apr 2024 07:51:09 +0000 Received: from i5e8616c3.versanet.de ([94.134.22.195] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1rvudE-0001KG-L5; Sun, 14 Apr 2024 09:50:32 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: soc@kernel.org, Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Dinh Nguyen , Tsahee Zidenberg , Antoine Tenart , Khuong Dinh , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , Ray Jui , Scott Branden , Robert Richter , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , "Paul J. Murphy" , Daniele Alessandrelli , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , Andreas =?ISO-8859-1?Q?F=E4rber?= , Orson Zhai , Baolin Wang , Chunyan Zhang , Jisheng Zhang , Alim Akhtar , linux-fsd@tesla.com, Michal Simek , Rob Herring Cc: devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-mediatek@lists.infradead.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: Re: [PATCH] arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usage Date: Sun, 14 Apr 2024 09:50:29 +0200 Message-ID: <2262532.iZASKD2KPV@diego> In-Reply-To: <20240412222857.3873079-1-robh@kernel.org> References: <20240412222857.3873079-1-robh@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240414_005108_049532_6D3EF637 X-CRM114-Status: GOOD ( 15.50 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Am Samstag, 13. April 2024, 00:28:51 CEST schrieb Rob Herring: > The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily, > it doesn't provide any detail on uarch specific events. > > There's still remaining cases for CPUs without any corresponding PMU > definition and for big.LITTLE systems which only have a single PMU node > (there should be one per core type). > > Signed-off-by: Rob Herring > --- > SoC Maintainers, Can you please apply this directly. > --- > arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 +- > diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > index 62af0cb94839..734f87db4d11 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > @@ -141,7 +141,7 @@ cpu_b3: cpu@103 { > }; > > arm-pmu { > - compatible = "arm,armv8-pmuv3"; > + compatible = "arm,cortex-a53-pmu"; > interrupts = , > , > , For Rockchip: Acked-by: Heiko Stuebner _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip