From: Heiko Stuebner <heiko@sntech.de>
To: Xing Zheng <zhengxing@rock-chips.com>
Cc: linux-rockchip@lists.infradead.org,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 3/9] clk: rockchip: add clock controller for rk3036
Date: Wed, 07 Oct 2015 12:24:32 +0200 [thread overview]
Message-ID: <2653032.av3sFfN860@phil> (raw)
In-Reply-To: <56036EAE.9040201@rock-chips.com>
Hi,
Am Donnerstag, 24. September 2015, 11:31:58 schrieb Xing Zheng:
> On 2015年09月24日 11:04, Xing Zheng wrote:
> >>> #define RK3066_PLL_RATE(_rate, _nr, _nf, _no) \
> >>>
> >>> @@ -95,12 +106,31 @@ enum rockchip_pll_type {
> >>>
> >>> .nb = _nb, \
> >>>
> >>> }
> >>>
> >>> +#define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1, \
> >>> + _postdiv2, _dsmpd, _frac) \
> >>> +{ \
> >>> + .rate = _rate##U, \
> >>> + .fbdiv = _fbdiv, \
> >>> + .postdiv1 = _postdiv1, \
> >>> + .refdiv = _refdiv, \
> >>> + .postdiv2 = _postdiv2, \
> >>> + .dsmpd = _dsmpd, \
> >>> + .frac = _frac, \
> >>> +}
> >>> +
> >>>
> >>> struct rockchip_pll_rate_table {
> >>>
> >>> unsigned long rate;
> >>> unsigned int nr;
> >>> unsigned int nf;
> >>> unsigned int no;
> >>> unsigned int nb;
> >>>
> >>> + /* for RK3036 */
> >>> + unsigned int fbdiv;
> >>> + unsigned int postdiv1;
> >>> + unsigned int refdiv;
> >>> + unsigned int postdiv2;
> >>> + unsigned int dsmpd;
> >>> + unsigned int frac;
> >>
> >> same for these 2 ... should be part of the pll addition itself
> >>
> > };
> >
> > Done.
>
> Sorry, I have one question:
> The "struct rockchip_pll_rate_table" is called in "rockchip/clk-pll.c"
> on many functions, I think I could add a struct like:
> struct rk3036_pll_rate_table {
> unsigned int fbdiv;
> unsigned int postdiv1;
> unsigned int refdiv;
> unsigned int postdiv2;
> unsigned int dsmpd;
> unsigned int frac;
> };
> but, it will add many redundancy codes in "rockchip/clk-pll.c" just for
> call "struct rk3036_pll_rate_table".
One possible solution may be to cast to void* in the general functions, so
have sturct rk3066_pll_rate_table, rk3036_pll_rate_table, have
rockchip_clk_register_pll and friends handle it as void* and then only have
the rockchip_rk3066_pll_* functions as well as the clk-rkxxxx.c use them as
their actual type, as they know which they need.
Heiko
next prev parent reply other threads:[~2015-10-07 10:24 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-17 8:28 [PATCH v2 0/9] Build and support rk3036 SoC platform Xing Zheng
2015-09-17 9:59 ` Heiko Stübner
[not found] ` <1442478540-15068-1-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-09-17 8:28 ` [PATCH v2 1/9] ARM: dts: rockchip: add core rk3036 dts Xing Zheng
2015-09-17 9:18 ` Heiko Stübner
2015-09-24 2:18 ` Xing Zheng
2015-09-17 8:28 ` [PATCH v2 2/9] clk: rockchip: add dt-binding header for rk3036 Xing Zheng
[not found] ` <1442478540-15068-3-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-09-17 9:25 ` Heiko Stübner
2015-09-24 2:17 ` Xing Zheng
2015-09-17 8:28 ` [PATCH v2 3/9] clk: rockchip: add clock controller " Xing Zheng
2015-09-17 9:47 ` Heiko Stübner
2015-09-24 3:04 ` Xing Zheng
2015-09-24 3:31 ` Xing Zheng
2015-10-07 10:24 ` Heiko Stuebner [this message]
2015-09-17 8:28 ` [PATCH v2 4/9] clk: rockchip: add new clock type and " Xing Zheng
[not found] ` <1442478540-15068-5-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-09-17 9:54 ` Heiko Stübner
2015-09-22 22:41 ` Stephen Boyd
2015-09-22 22:58 ` Heiko Stübner
2015-09-22 23:19 ` Stephen Boyd
2015-09-30 23:32 ` Heiko Stübner
2015-10-01 0:51 ` Stephen Boyd
2015-09-17 10:32 ` [PATCH v2 5/9] dt-bindings: add documentation of rk3036 clock controller Xing Zheng
[not found] ` <1442485969-1733-1-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-09-17 15:09 ` Heiko Stübner
2015-09-24 3:42 ` Xing Zheng
2015-09-17 10:34 ` [PATCH v2 6/9] pinctrl: rockchip: add support for the rk3036 Xing Zheng
2015-09-17 12:47 ` Heiko Stübner
2015-09-17 10:37 ` [PATCH v2 7/9] rockchip: make sure timer5 is enabled on rk3036 platforms Xing Zheng
2015-09-17 15:05 ` Heiko Stübner
2015-09-28 12:25 ` Xing Zheng
2015-09-28 12:44 ` Heiko Stübner
2015-09-28 12:53 ` Xing Zheng
2015-09-17 10:38 ` [PATCH v2 8/9] ARM: rockchip: add support smp for rk3036 Xing Zheng
2015-09-17 20:15 ` Heiko Stübner
2015-09-28 11:50 ` Xing Zheng
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