From: "Heiko Stübner" <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
To: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Cc: huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
zhangqing-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v3 4/7] clk: rockchip: rk3399: fix incorrect aclk_emmc source gate bits
Date: Fri, 12 Aug 2016 10:05:37 +0200 [thread overview]
Message-ID: <2820412.n3i6OJSAzs@diego> (raw)
In-Reply-To: <1470122401-31934-5-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Am Dienstag, 2. August 2016, 15:19:58 schrieb Xing Zheng:
> Dues to incorrect diagram, we need to fix incorrect bits for
> (c/g)pll_aclk_emmc_src:
> cpll_aclk_emmc_src --> G6[13]
> gpll_aclk_emmc_src --> G6[12]
>
> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Reviewed-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
applied to my clk-fixes branch for 4.8
Thanks
Heiko
next prev parent reply other threads:[~2016-08-12 8:05 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-02 7:19 [PATCH v3 0/7] fix and optimize some clock configuration for the RK3399 platfom Xing Zheng
[not found] ` <1470122401-31934-1-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-08-02 7:19 ` [PATCH v3 1/7] clk: rockchip: rk3399: export USBPHYx_480M_SRC clock IDs Xing Zheng
2016-08-02 7:19 ` [PATCH v3 2/7] clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1 Xing Zheng
2016-08-04 19:10 ` Heiko Stübner
2016-08-05 8:34 ` Frank Wang
2016-08-05 16:05 ` Heiko Stübner
2016-08-08 9:55 ` Frank Wang
2016-08-16 6:34 ` Frank Wang
2016-08-02 7:19 ` [PATCH v3 3/7] clk: rockchip: rk3399: fix incorrect GATE bits for {c, g}pll_aclk_perihp_src Xing Zheng
2016-08-12 16:30 ` Heiko Stübner
2016-08-02 7:19 ` [PATCH v3 4/7] clk: rockchip: rk3399: fix incorrect aclk_emmc source gate bits Xing Zheng
[not found] ` <1470122401-31934-5-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-08-12 8:05 ` Heiko Stübner [this message]
2016-08-02 7:22 ` [PATCH v3 5/7] clk: rockchip: rk3399: add 65MHz and 106.5MHz clocks for HDMI Xing Zheng
2016-08-04 19:05 ` Heiko Stübner
2016-08-02 7:22 ` [PATCH v3 6/7] clk: rockchip: rk3399: delete the CLK_IGNORE_UNUSED for aclk_pcie Xing Zheng
2016-08-04 19:06 ` Heiko Stübner
2016-08-02 7:22 ` [PATCH v3 7/7] clk: rockchip: rk3399: Add support frac mode frequencies Xing Zheng
2016-08-04 19:19 ` Heiko Stübner
2016-08-05 2:26 ` Xing Zheng
2016-08-05 8:48 ` Heiko Stübner
2016-08-05 13:23 ` Xing Zheng
2016-08-05 13:26 ` Heiko Stübner
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