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Tue, 14 Feb 2023 15:56:06 -0800 (PST) Received: from [10.225.163.116] (unknown [10.225.163.116]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4PGdQC15SSz1RvLy; Tue, 14 Feb 2023 15:56:02 -0800 (PST) Message-ID: <2ebd33e2-46ef-356d-ff4c-81b74950d02f@opensource.wdc.com> Date: Wed, 15 Feb 2023 08:56:01 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH v2 1/9] PCI: rockchip: Remove writes to unused registers Content-Language: en-US To: Rick Wertenbroek , alberto.dassatti@heig-vd.ch Cc: xxm@rock-chips.com, rick.wertenbroek@heig-vd.ch, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Shawn Lin , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Bjorn Helgaas , Jani Nikula , Greg Kroah-Hartman , Rodrigo Vivi , Mikko Kovanen , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org References: <20230214140858.1133292-1-rick.wertenbroek@gmail.com> <20230214140858.1133292-2-rick.wertenbroek@gmail.com> From: Damien Le Moal Organization: Western Digital Research In-Reply-To: <20230214140858.1133292-2-rick.wertenbroek@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230214_155612_484255_E798FD21 X-CRM114-Status: GOOD ( 19.35 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On 2/14/23 23:08, Rick Wertenbroek wrote: > Remove write accesses to registers that are marked "unused" (and > therefore read-only) in the technical reference manual (TRM) > (see RK3399 TRM 17.6.8.1) > > Signed-off-by: Rick Wertenbroek I checked the TRM and indeed these registers are listed as unused. However, with this patch, nothing work for me using a Pine rockpro64 board. Keeping this patch, your series (modulo some other fixes, more emails coming) is making things work ! So I think the bug is with the TRM, not the code. THinking logically about htis, it makes sense: this is programming the address translation unit to translate mmio & dma between host PCI address and local CPU space address. If we never set the PU address, how can that unit possibly ever translate anything ? > --- > drivers/pci/controller/pcie-rockchip-ep.c | 10 ---------- > 1 file changed, 10 deletions(-) > > diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c > index d1a200b93..d5c477020 100644 > --- a/drivers/pci/controller/pcie-rockchip-ep.c > +++ b/drivers/pci/controller/pcie-rockchip-ep.c > @@ -61,10 +61,6 @@ static void rockchip_pcie_clear_ep_ob_atu(struct rockchip_pcie *rockchip, > ROCKCHIP_PCIE_AT_OB_REGION_DESC0(region)); > rockchip_pcie_write(rockchip, 0, > ROCKCHIP_PCIE_AT_OB_REGION_DESC1(region)); > - rockchip_pcie_write(rockchip, 0, > - ROCKCHIP_PCIE_AT_OB_REGION_CPU_ADDR0(region)); > - rockchip_pcie_write(rockchip, 0, > - ROCKCHIP_PCIE_AT_OB_REGION_CPU_ADDR1(region)); > } > > static void rockchip_pcie_prog_ep_ob_atu(struct rockchip_pcie *rockchip, u8 fn, > @@ -114,12 +110,6 @@ static void rockchip_pcie_prog_ep_ob_atu(struct rockchip_pcie *rockchip, u8 fn, > PCIE_CORE_OB_REGION_ADDR0_LO_ADDR); > addr1 = upper_32_bits(cpu_addr); > } > - > - /* CPU bus address region */ > - rockchip_pcie_write(rockchip, addr0, > - ROCKCHIP_PCIE_AT_OB_REGION_CPU_ADDR0(r)); > - rockchip_pcie_write(rockchip, addr1, > - ROCKCHIP_PCIE_AT_OB_REGION_CPU_ADDR1(r)); > } > > static int rockchip_pcie_ep_write_header(struct pci_epc *epc, u8 fn, u8 vfn, -- Damien Le Moal Western Digital Research _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip