linux-rockchip.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v5 0/7] FriendlyELEC NanoPC-T6 improvements
@ 2024-08-26  8:02 Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 1/7] dt-bindings: arm: rockchip: Add NanoPC-T6 LTS Marcin Juszkiewicz
                   ` (6 more replies)
  0 siblings, 7 replies; 10+ messages in thread
From: Marcin Juszkiewicz @ 2024-08-26  8:02 UTC (permalink / raw)
  To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-rockchip, devicetree, Jonas Karlman, Marcin Juszkiewicz,
	Krzysztof Kozlowski

This series updates FriendlyELEC NanoPC-T6 situation. There is non-LTS
(2301) version of a board and LTS (2310) version.

This series creates common DTSI for both boards and then separate
NanoPC-T6 and NanoPC-T6 LTS DTS files. This way T6 gets MiniPCIe section
and T6-LTS gets USB20 section.

Then set of changes for both versions are done:

- enable USB-C port (one orientation only)
- enable Mali GPU
- enable IR receiver (tested using ir-keytable)
- enable SPI flash (present on LTS, optional on non-LTS)
- enable Mask Rom button as input device

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

---
Changes in v5:
- added Reviewed-by to 'add spi flash' patch
- dropped adding SPI M1 pinctl
- changed ir-receiver to have pinctrl like Jonas Karlman suggested
- Link to v4: https://lore.kernel.org/r/20240822-friendlyelec-nanopc-t6-lts-v4-0-892aebcec0c6@linaro.org

Changes in v4:
- added Acked-by to dt-bindings patch
- create common dtsi for both board versions
- nanopc-t6.dts has minipcie items
- nanopc-t6-lts.dts has usb 2.0 host enablement
- Link to v3: https://lore.kernel.org/r/20240821-friendlyelec-nanopc-t6-lts-v3-0-3ecfa996bbe0@linaro.org

Changes in v3:
- create separate NanoPC-T6 LTS devicetree as suggested
- Link to v2: https://lore.kernel.org/r/20240821-friendlyelec-nanopc-t6-lts-v2-0-e0138bb10042@linaro.org

Changes in v2:
- merged changes into NanoPC-T6 dts file
- add SPI flash pinctl for SPI M1
- enable SPI on NanoPC-T6 LTS
- enable USB-C port (one orientation only)
- enable Mali GPI
- enable IR receiver (not tested)
- Link to v1: https://lore.kernel.org/r/20240820-friendlyelec-nanopc-t6-lts-v1-1-da1273c3e08e@juszkiewicz.com.pl

---
Marcin Juszkiewicz (7):
      dt-bindings: arm: rockchip: Add NanoPC-T6 LTS
      arm64: dts: rockchip: add NanoPC-T6 LTS
      arm64: dts: rockchip: add SPI flash on NanoPC-T6
      arm64: dts: rockchip: add IR-receiver to NanoPC-T6
      arm64: dts: rockchip: enable GPU on NanoPC-T6
      arm64: dts: rockchip: enable USB-C on NanoPC-T6
      arm64: dts: rockchip: add Mask Rom key on NanoPC-T6

 .../devicetree/bindings/arm/rockchip.yaml          |   6 +-
 arch/arm64/boot/dts/rockchip/Makefile              |   1 +
 .../boot/dts/rockchip/rk3588-nanopc-t6-lts.dts     |  61 ++
 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts  | 910 +--------------------
 ...{rk3588-nanopc-t6.dts => rk3588-nanopc-t6.dtsi} | 142 +++-
 5 files changed, 191 insertions(+), 929 deletions(-)
---
base-commit: 5be63fc19fcaa4c236b307420483578a56986a37
change-id: 20240820-friendlyelec-nanopc-t6-lts-00c7678c3bd7

Best regards,
-- 
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v5 1/7] dt-bindings: arm: rockchip: Add NanoPC-T6 LTS
  2024-08-26  8:02 [PATCH v5 0/7] FriendlyELEC NanoPC-T6 improvements Marcin Juszkiewicz
@ 2024-08-26  8:02 ` Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 2/7] arm64: dts: rockchip: add " Marcin Juszkiewicz
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Marcin Juszkiewicz @ 2024-08-26  8:02 UTC (permalink / raw)
  To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-rockchip, devicetree, Jonas Karlman, Marcin Juszkiewicz,
	Krzysztof Kozlowski

Add devicetree binding for the NanoPC-T6 LTS board.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 1ef09fbfdfaf..f45c7d055a6a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -243,9 +243,11 @@ properties:
               - friendlyarm,nanopi-r6s
           - const: rockchip,rk3588s
 
-      - description: FriendlyElec NanoPC T6
+      - description: FriendlyElec NanoPC T6 series boards
         items:
-          - const: friendlyarm,nanopc-t6
+          - enum:
+              - friendlyarm,nanopc-t6
+              - friendlyarm,nanopc-t6-lts
           - const: rockchip,rk3588
 
       - description: FriendlyElec CM3588-based boards

-- 
2.46.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 2/7] arm64: dts: rockchip: add NanoPC-T6 LTS
  2024-08-26  8:02 [PATCH v5 0/7] FriendlyELEC NanoPC-T6 improvements Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 1/7] dt-bindings: arm: rockchip: Add NanoPC-T6 LTS Marcin Juszkiewicz
@ 2024-08-26  8:02 ` Marcin Juszkiewicz
  2024-08-26 10:52   ` Diederik de Haas
  2024-08-28 17:06   ` Heiko Stübner
  2024-08-26  8:02 ` [PATCH v5 3/7] arm64: dts: rockchip: add SPI flash on NanoPC-T6 Marcin Juszkiewicz
                   ` (4 subsequent siblings)
  6 siblings, 2 replies; 10+ messages in thread
From: Marcin Juszkiewicz @ 2024-08-26  8:02 UTC (permalink / raw)
  To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-rockchip, devicetree, Jonas Karlman, Marcin Juszkiewicz

FriendlyELEC introduced a second version of NanoPC-T6 SBC.

Create common include file and separate DT files for each version of the
board.

In the LTS version the miniPCIe slot got removed and USB 2.0 setup has
changed. There are two external accessible ports and two ports on the
internal header.

There is an on-board USB hub which provides:
- one external connector (bottom one)
- two internal ports on pin header
- one port for m.2 E connector

The top USB 2.0 connector comes directly from the SoC.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
 arch/arm64/boot/dts/rockchip/Makefile              |   1 +
 .../boot/dts/rockchip/rk3588-nanopc-t6-lts.dts     |  61 ++
 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts  | 910 +--------------------
 ...{rk3588-nanopc-t6.dts => rk3588-nanopc-t6.dtsi} |  16 -
 4 files changed, 66 insertions(+), 922 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index fda1b980eb4b..0f982c741243 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -128,6 +128,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts
new file mode 100644
index 000000000000..fc465957a00b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2023 Thomas McKahan
+ * Copyright (c) 2024 Linaro Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "rk3588-nanopc-t6.dtsi"
+
+/ {
+	model = "FriendlyElec NanoPC-T6 LTS";
+	compatible = "friendlyarm,nanopc-t6-lts", "rockchip,rk3588";
+
+	/* provide power for on-board USB 2.0 hub */
+	vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&usb20_host_pwren>;
+		pinctrl-names = "default";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-max-microvolt = <5000000>;
+		regulator-min-microvolt = <5000000>;
+		regulator-name = "vcc5v0_usb20_host";
+		vin-supply = <&vcc5v0_sys>;
+	};
+};
+
+&pinctrl {
+	usb {
+		usb20_host_pwren: usb20-host-pwren {
+			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&u2phy1 {
+	status = "okay";
+};
+
+&u2phy1_otg {
+	status = "okay";
+};
+
+&u2phy2_host {
+	phy-supply = <&vcc5v0_usb20_host>;
+	status = "okay";
+};
+
+&usbdp_phy1 {
+	status = "okay";
+};
+
+&usb_host1_xhci {
+	dr_mode = "host";
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
index ad8e36a339dc..2a2dc77c71b1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -2,175 +2,19 @@
 /*
  * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
  * Copyright (c) 2023 Thomas McKahan
+ * Copyright (c) 2024 Linaro Ltd.
  *
  */
 
 /dts-v1/;
 
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/usb/pd.h>
-#include "rk3588.dtsi"
+#include "rk3588-nanopc-t6.dtsi"
 
 / {
 	model = "FriendlyElec NanoPC-T6";
 	compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588";
 
-	aliases {
-		mmc0 = &sdhci;
-		mmc1 = &sdmmc;
-	};
-
-	chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		sys_led: led-0 {
-			gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
-			label = "system-led";
-			linux,default-trigger = "heartbeat";
-			pinctrl-names = "default";
-			pinctrl-0 = <&sys_led_pin>;
-		};
-
-		usr_led: led-1 {
-			gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
-			label = "user-led";
-			pinctrl-names = "default";
-			pinctrl-0 = <&usr_led_pin>;
-		};
-	};
-
-	sound {
-		compatible = "simple-audio-card";
-		pinctrl-names = "default";
-		pinctrl-0 = <&hp_det>;
-
-		simple-audio-card,name = "realtek,rt5616-codec";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,mclk-fs = <256>;
-
-		simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
-		simple-audio-card,hp-pin-name = "Headphones";
-
-		simple-audio-card,widgets =
-			"Headphone", "Headphones",
-			"Microphone", "Microphone Jack";
-		simple-audio-card,routing =
-			"Headphones", "HPOL",
-			"Headphones", "HPOR",
-			"MIC1", "Microphone Jack",
-			"Microphone Jack", "micbias1";
-
-		simple-audio-card,cpu {
-			sound-dai = <&i2s0_8ch>;
-		};
-		simple-audio-card,codec {
-			sound-dai = <&rt5616>;
-		};
-	};
-
-	vcc12v_dcin: vcc12v-dcin-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc12v_dcin";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-	};
-
-	/* vcc5v0_sys powers peripherals */
-	vcc5v0_sys: vcc5v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	/* vcc4v0_sys powers the RK806, RK860's */
-	vcc4v0_sys: vcc4v0-sys-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc4v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <4000000>;
-		regulator-max-microvolt = <4000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc-1v1-nldo-s3";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1100000>;
-		regulator-max-microvolt = <1100000>;
-		vin-supply = <&vcc4v0_sys>;
-	};
-
-	vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_3v3_pcie20";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc_3v3_s3>;
-	};
-
-	vbus5v0_typec: vbus5v0-typec-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&typec5v_pwren>;
-		regulator-name = "vbus5v0_typec";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pcie_m2_1_pwren>;
-		regulator-name = "vcc3v3_pcie2x1l0";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc3v3_pcie30: vcc3v3-pcie30-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pcie_m2_0_pwren>;
-		regulator-name = "vcc3v3_pcie30";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc3v3_sd_s0: vcc3v3-sd-s0-regulator {
-		compatible = "regulator-fixed";
-		enable-active-low;
-		gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>;
-		regulator-boot-on;
-		regulator-max-microvolt = <3300000>;
-		regulator-min-microvolt = <3300000>;
-		regulator-name = "vcc3v3_sd_s0";
-		vin-supply = <&vcc_3v3_s3>;
-	};
-
+	/* provide power for minipcie slot */
 	vdd_4g_3v3: vdd-4g-3v3-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
@@ -184,762 +28,16 @@ vdd_4g_3v3: vdd-4g-3v3-regulator {
 	};
 };
 
-&combphy0_ps {
-	status = "okay";
-};
-
-&combphy1_ps {
-	status = "okay";
-};
-
-&combphy2_psu {
-	status = "okay";
-};
-
-&cpu_l0 {
-	cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
-	cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
-	cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
-	cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_b0 {
-	cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
-	cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
-	cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
-	cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&gpio0 {
-	gpio-line-names = /* GPIO0 A0-A7 */
-			  "", "", "", "",
-			  "", "", "", "",
-			  /* GPIO0 B0-B7 */
-			  "", "", "", "",
-			  "", "", "", "",
-			  /* GPIO0 C0-C7 */
-			  "", "", "", "",
-			  "HEADER_10", "HEADER_08", "HEADER_32", "",
-			  /* GPIO0 D0-D7 */
-			  "", "", "", "",
-			  "", "", "", "";
-};
-
-&gpio1 {
-	gpio-line-names = /* GPIO1 A0-A7 */
-			  "HEADER_27", "HEADER_28", "", "",
-			  "", "", "", "HEADER_15",
-			  /* GPIO1 B0-B7 */
-			  "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23",
-			  "HEADER_24", "HEADER_22", "", "",
-			  /* GPIO1 C0-C7 */
-			  "", "", "", "",
-			  "", "", "", "",
-			  /* GPIO1 D0-D7 */
-			  "", "", "", "",
-			  "", "", "HEADER_05", "HEADER_03";
-};
-
-&gpio2 {
-	gpio-line-names = /* GPIO2 A0-A7 */
-			  "", "", "", "",
-			  "", "", "", "",
-			  /* GPIO2 B0-B7 */
-			  "", "", "", "",
-			  "", "", "", "",
-			  /* GPIO2 C0-C7 */
-			  "", "CSI1_11", "CSI1_12", "",
-			  "", "", "", "",
-			  /* GPIO2 D0-D7 */
-			  "", "", "", "",
-			  "", "", "", "";
-};
-
-&gpio3 {
-	gpio-line-names = /* GPIO3 A0-A7 */
-			  "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36",
-			  "HEADER_37", "", "DSI0_12", "",
-			  /* GPIO3 B0-B7 */
-			  "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16",
-			  "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12",
-			  /* GPIO3 C0-C7 */
-			  "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13",
-			  "", "", "", "",
-			  /* GPIO3 D0-D7 */
-			  "", "", "", "",
-			  "", "DSI1_10", "", "";
-};
-
-&gpio4 {
-	gpio-line-names = /* GPIO4 A0-A7 */
-			  "DSI1_08", "DSI1_14", "", "DSI1_12",
-			  "", "", "", "",
-			  /* GPIO4 B0-B7 */
-			  "", "", "", "",
-			  "", "", "", "",
-			  /* GPIO4 C0-C7 */
-			  "", "", "", "",
-			  "CSI0_11", "CSI0_12", "", "",
-			  /* GPIO4 D0-D7 */
-			  "", "", "", "",
-			  "", "", "", "";
-};
-
-&i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0m2_xfer>;
-	status = "okay";
-
-	vdd_cpu_big0_s0: regulator@42 {
-		compatible = "rockchip,rk8602";
-		reg = <0x42>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu_big0_s0";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <550000>;
-		regulator-max-microvolt = <1050000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc4v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	vdd_cpu_big1_s0: regulator@43 {
-		compatible = "rockchip,rk8603", "rockchip,rk8602";
-		reg = <0x43>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_cpu_big1_s0";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <550000>;
-		regulator-max-microvolt = <1050000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc4v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-};
-
-&i2c2 {
-	status = "okay";
-
-	vdd_npu_s0: regulator@42 {
-		compatible = "rockchip,rk8602";
-		reg = <0x42>;
-		rockchip,suspend-voltage-selector = <1>;
-		regulator-name = "vdd_npu_s0";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <550000>;
-		regulator-max-microvolt = <950000>;
-		regulator-ramp-delay = <2300>;
-		vin-supply = <&vcc4v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-};
-
-&i2c6 {
-	clock-frequency = <200000>;
-	status = "okay";
-
-	fusb302: typec-portc@22 {
-		compatible = "fcs,fusb302";
-		reg = <0x22>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-0 = <&usbc0_int>;
-		pinctrl-names = "default";
-		vbus-supply = <&vbus5v0_typec>;
-
-		connector {
-			compatible = "usb-c-connector";
-			data-role = "dual";
-			label = "USB-C";
-			power-role = "dual";
-			try-power-role = "sink";
-			source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
-			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
-			op-sink-microwatt = <1000000>;
-		};
-	};
-
-	hym8563: rtc@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		#clock-cells = <0>;
-		clock-output-names = "hym8563";
-		pinctrl-names = "default";
-		pinctrl-0 = <&hym8563_int>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
-		wakeup-source;
-	};
-};
-
-&i2c7 {
-	clock-frequency = <200000>;
-	status = "okay";
-
-	rt5616: codec@1b {
-		compatible = "realtek,rt5616";
-		reg = <0x1b>;
-		clocks = <&cru I2S0_8CH_MCLKOUT>;
-		clock-names = "mclk";
-		#sound-dai-cells = <0>;
-		assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
-		assigned-clock-rates = <12288000>;
-
-		port {
-			rt5616_p0_0: endpoint {
-				remote-endpoint = <&i2s0_8ch_p0_0>;
-			};
-		};
-	};
-
-	/* connected with MIPI-CSI1 */
-};
-
-&i2c8 {
-	pinctrl-0 = <&i2c8m2_xfer>;
-};
-
-&i2s0_8ch {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2s0_lrck
-		     &i2s0_mclk
-		     &i2s0_sclk
-		     &i2s0_sdi0
-		     &i2s0_sdo0>;
-	status = "okay";
-
-	i2s0_8ch_p0: port {
-		i2s0_8ch_p0_0: endpoint {
-			dai-format = "i2s";
-			mclk-fs = <256>;
-			remote-endpoint = <&rt5616_p0_0>;
-		};
-	};
-};
-
-&pcie2x1l0 {
-	reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc_3v3_pcie20>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie2_0_rst>;
-	status = "okay";
-};
-
-&pcie2x1l1 {
-	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie2_1_rst>;
-	status = "okay";
-};
-
-&pcie2x1l2 {
-	reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc_3v3_pcie20>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie2_2_rst>;
-	status = "okay";
-};
-
-&pcie30phy {
-	status = "okay";
-};
-
-&pcie3x4 {
-	reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&vcc3v3_pcie30>;
-	status = "okay";
-};
-
 &pinctrl {
-	gpio-leds {
-		sys_led_pin: sys-led-pin {
-			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		usr_led_pin: usr-led-pin {
-			rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	headphone {
-		hp_det: hp-det {
-			rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	hym8563 {
-		hym8563_int: hym8563-int {
-			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	pcie {
-		pcie2_0_rst: pcie2-0-rst {
-			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie2_1_rst: pcie2-1-rst {
-			rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie2_2_rst: pcie2-2-rst {
-			rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie_m2_0_pwren: pcie-m20-pwren {
-			rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie_m2_1_pwren: pcie-m21-pwren {
-			rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
 	usb {
 		pin_4g_lte_pwren: 4g-lte-pwren {
 			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
-
-		typec5v_pwren: typec5v-pwren {
-			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		usbc0_int: usbc0-int {
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
 	};
 };
 
-&pwm1 {
-	pinctrl-0 = <&pwm1m1_pins>;
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&avcc_1v8_s0>;
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	no-sdio;
-	no-sd;
-	non-removable;
-	max-frequency = <200000000>;
-	mmc-hs400-1_8v;
-	mmc-hs400-enhanced-strobe;
-	status = "okay";
-};
-
-&sdmmc {
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	no-mmc;
-	no-sdio;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc3v3_sd_s0>;
-	vqmmc-supply = <&vccio_sd_s0>;
-	status = "okay";
-};
-
-&spi2 {
-	status = "okay";
-	assigned-clocks = <&cru CLK_SPI2>;
-	assigned-clock-rates = <200000000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
-	num-cs = <1>;
-
-	pmic@0 {
-		compatible = "rockchip,rk806";
-		spi-max-frequency = <1000000>;
-		reg = <0x0>;
-
-		interrupt-parent = <&gpio0>;
-		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
-
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
-			    <&rk806_dvs2_null>, <&rk806_dvs3_null>;
-
-		system-power-controller;
-
-		vcc1-supply = <&vcc4v0_sys>;
-		vcc2-supply = <&vcc4v0_sys>;
-		vcc3-supply = <&vcc4v0_sys>;
-		vcc4-supply = <&vcc4v0_sys>;
-		vcc5-supply = <&vcc4v0_sys>;
-		vcc6-supply = <&vcc4v0_sys>;
-		vcc7-supply = <&vcc4v0_sys>;
-		vcc8-supply = <&vcc4v0_sys>;
-		vcc9-supply = <&vcc4v0_sys>;
-		vcc10-supply = <&vcc4v0_sys>;
-		vcc11-supply = <&vcc_2v0_pldo_s3>;
-		vcc12-supply = <&vcc4v0_sys>;
-		vcc13-supply = <&vcc_1v1_nldo_s3>;
-		vcc14-supply = <&vcc_1v1_nldo_s3>;
-		vcca-supply = <&vcc4v0_sys>;
-
-		gpio-controller;
-		#gpio-cells = <2>;
-
-		rk806_dvs1_null: dvs1-null-pins {
-			pins = "gpio_pwrctrl1";
-			function = "pin_fun0";
-		};
-
-		rk806_dvs2_null: dvs2-null-pins {
-			pins = "gpio_pwrctrl2";
-			function = "pin_fun0";
-		};
-
-		rk806_dvs3_null: dvs3-null-pins {
-			pins = "gpio_pwrctrl3";
-			function = "pin_fun0";
-		};
-
-		regulators {
-			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
-				regulator-boot-on;
-				regulator-min-microvolt = <550000>;
-				regulator-max-microvolt = <950000>;
-				regulator-ramp-delay = <12500>;
-				regulator-name = "vdd_gpu_s0";
-				regulator-enable-ramp-delay = <400>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <550000>;
-				regulator-max-microvolt = <950000>;
-				regulator-ramp-delay = <12500>;
-				regulator-name = "vdd_cpu_lit_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_log_s0: dcdc-reg3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <675000>;
-				regulator-max-microvolt = <750000>;
-				regulator-ramp-delay = <12500>;
-				regulator-name = "vdd_log_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <750000>;
-				};
-			};
-
-			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <550000>;
-				regulator-max-microvolt = <950000>;
-				regulator-init-microvolt = <750000>;
-				regulator-ramp-delay = <12500>;
-				regulator-name = "vdd_vdenc_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_ddr_s0: dcdc-reg5 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <675000>;
-				regulator-max-microvolt = <900000>;
-				regulator-ramp-delay = <12500>;
-				regulator-name = "vdd_ddr_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <850000>;
-				};
-			};
-
-			vdd2_ddr_s3: dcdc-reg6 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-name = "vdd2_ddr_s3";
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vcc_2v0_pldo_s3: dcdc-reg7 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <2000000>;
-				regulator-max-microvolt = <2000000>;
-				regulator-ramp-delay = <12500>;
-				regulator-name = "vdd_2v0_pldo_s3";
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <2000000>;
-				};
-			};
-
-			vcc_3v3_s3: dcdc-reg8 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-name = "vcc_3v3_s3";
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vddq_ddr_s0: dcdc-reg9 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-name = "vddq_ddr_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8_s3: dcdc-reg10 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc_1v8_s3";
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			avcc_1v8_s0: pldo-reg1 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "avcc_1v8_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v8_s0: pldo-reg2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc_1v8_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			avdd_1v2_s0: pldo-reg3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-				regulator-name = "avdd_1v2_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v3_s0: pldo-reg4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-ramp-delay = <12500>;
-				regulator-name = "vcc_3v3_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vccio_sd_s0: pldo-reg5 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-ramp-delay = <12500>;
-				regulator-name = "vccio_sd_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			pldo6_s3: pldo-reg6 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-name = "pldo6_s3";
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vdd_0v75_s3: nldo-reg1 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <750000>;
-				regulator-name = "vdd_0v75_s3";
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <750000>;
-				};
-			};
-
-			vdd_ddr_pll_s0: nldo-reg2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <850000>;
-				regulator-max-microvolt = <850000>;
-				regulator-name = "vdd_ddr_pll_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <850000>;
-				};
-			};
-
-			avdd_0v75_s0: nldo-reg3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <750000>;
-				regulator-name = "avdd_0v75_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_0v85_s0: nldo-reg4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <850000>;
-				regulator-max-microvolt = <850000>;
-				regulator-name = "vdd_0v85_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_0v75_s0: nldo-reg5 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <750000>;
-				regulator-name = "vdd_0v75_s0";
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-	};
-};
-
-&tsadc {
-	status = "okay";
-};
-
-&uart2 {
-	pinctrl-0 = <&uart2m0_xfer>;
-	status = "okay";
-};
-
+/* USB 2.0 in minipcie slot */
 &u2phy2_host {
 	phy-supply = <&vdd_4g_3v3>;
 	status = "okay";
 };
-
-&u2phy3_host {
-	status = "okay";
-};
-
-&u2phy2 {
-	status = "okay";
-};
-
-&u2phy3 {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
similarity index 97%
copy from arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
copy to arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
index ad8e36a339dc..ce0db9b8b126 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -170,18 +170,6 @@ vcc3v3_sd_s0: vcc3v3-sd-s0-regulator {
 		regulator-name = "vcc3v3_sd_s0";
 		vin-supply = <&vcc_3v3_s3>;
 	};
-
-	vdd_4g_3v3: vdd-4g-3v3-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pin_4g_lte_pwren>;
-		regulator-name = "vdd_4g_3v3";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
 };
 
 &combphy0_ps {
@@ -527,10 +515,6 @@ pcie_m2_1_pwren: pcie-m21-pwren {
 	};
 
 	usb {
-		pin_4g_lte_pwren: 4g-lte-pwren {
-			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
 		typec5v_pwren: typec5v-pwren {
 			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
 		};

-- 
2.46.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 3/7] arm64: dts: rockchip: add SPI flash on NanoPC-T6
  2024-08-26  8:02 [PATCH v5 0/7] FriendlyELEC NanoPC-T6 improvements Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 1/7] dt-bindings: arm: rockchip: Add NanoPC-T6 LTS Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 2/7] arm64: dts: rockchip: add " Marcin Juszkiewicz
@ 2024-08-26  8:02 ` Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 4/7] arm64: dts: rockchip: add IR-receiver to NanoPC-T6 Marcin Juszkiewicz
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Marcin Juszkiewicz @ 2024-08-26  8:02 UTC (permalink / raw)
  To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-rockchip, devicetree, Jonas Karlman, Marcin Juszkiewicz

FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
index ce0db9b8b126..292022a56332 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -560,6 +560,21 @@ &sdmmc {
 	status = "okay";
 };
 
+/* optional on non-LTS, populated on LTS version */
+&sfc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&fspim1_pins>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <104000000>;
+		spi-rx-bus-width = <4>;
+		spi-tx-bus-width = <1>;
+	};
+};
+
 &spi2 {
 	status = "okay";
 	assigned-clocks = <&cru CLK_SPI2>;

-- 
2.46.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 4/7] arm64: dts: rockchip: add IR-receiver to NanoPC-T6
  2024-08-26  8:02 [PATCH v5 0/7] FriendlyELEC NanoPC-T6 improvements Marcin Juszkiewicz
                   ` (2 preceding siblings ...)
  2024-08-26  8:02 ` [PATCH v5 3/7] arm64: dts: rockchip: add SPI flash on NanoPC-T6 Marcin Juszkiewicz
@ 2024-08-26  8:02 ` Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 5/7] arm64: dts: rockchip: enable GPU on NanoPC-T6 Marcin Juszkiewicz
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Marcin Juszkiewicz @ 2024-08-26  8:02 UTC (permalink / raw)
  To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-rockchip, devicetree, Jonas Karlman, Marcin Juszkiewicz

FriendlyELEC NanoPC-T6 has IR receiver connected to PWM3_IR_M0 line
which ends as GPIO0_D4.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
index 292022a56332..710867e658ff 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -25,6 +25,13 @@ chosen {
 		stdout-path = "serial2:1500000n8";
 	};
 
+	ir-receiver {
+		compatible = "gpio-ir-receiver";
+		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&ir_receiver_pin>;
+	};
+
 	leds {
 		compatible = "gpio-leds";
 
@@ -228,7 +235,7 @@ &gpio0 {
 			  "HEADER_10", "HEADER_08", "HEADER_32", "",
 			  /* GPIO0 D0-D7 */
 			  "", "", "", "",
-			  "", "", "", "";
+			  "IR receiver [PWM3_IR_M0]", "", "", "";
 };
 
 &gpio1 {
@@ -492,6 +499,12 @@ hym8563_int: hym8563-int {
 		};
 	};
 
+	ir-receiver {
+		ir_receiver_pin: ir-receiver-pin {
+			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	pcie {
 		pcie2_0_rst: pcie2-0-rst {
 			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;

-- 
2.46.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 5/7] arm64: dts: rockchip: enable GPU on NanoPC-T6
  2024-08-26  8:02 [PATCH v5 0/7] FriendlyELEC NanoPC-T6 improvements Marcin Juszkiewicz
                   ` (3 preceding siblings ...)
  2024-08-26  8:02 ` [PATCH v5 4/7] arm64: dts: rockchip: add IR-receiver to NanoPC-T6 Marcin Juszkiewicz
@ 2024-08-26  8:02 ` Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 6/7] arm64: dts: rockchip: enable USB-C " Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 7/7] arm64: dts: rockchip: add Mask Rom key " Marcin Juszkiewicz
  6 siblings, 0 replies; 10+ messages in thread
From: Marcin Juszkiewicz @ 2024-08-26  8:02 UTC (permalink / raw)
  To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-rockchip, devicetree, Jonas Karlman, Marcin Juszkiewicz

Enable the Mali GPU on FriendlyELEC NanoPC-T6

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
index 710867e658ff..465d294703f5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -298,6 +298,11 @@ &gpio4 {
 			  "", "", "", "";
 };
 
+&gpu {
+	mali-supply = <&vdd_gpu_s0>;
+	status = "okay";
+};
+
 &i2c0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c0m2_xfer>;

-- 
2.46.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 6/7] arm64: dts: rockchip: enable USB-C on NanoPC-T6
  2024-08-26  8:02 [PATCH v5 0/7] FriendlyELEC NanoPC-T6 improvements Marcin Juszkiewicz
                   ` (4 preceding siblings ...)
  2024-08-26  8:02 ` [PATCH v5 5/7] arm64: dts: rockchip: enable GPU on NanoPC-T6 Marcin Juszkiewicz
@ 2024-08-26  8:02 ` Marcin Juszkiewicz
  2024-08-26  8:02 ` [PATCH v5 7/7] arm64: dts: rockchip: add Mask Rom key " Marcin Juszkiewicz
  6 siblings, 0 replies; 10+ messages in thread
From: Marcin Juszkiewicz @ 2024-08-26  8:02 UTC (permalink / raw)
  To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-rockchip, devicetree, Jonas Karlman, Marcin Juszkiewicz

Enable the USB-C port on FriendlyELEC NanoPC-T6.

Works one way so far but still better than before.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 76 ++++++++++++++++++++--
 1 file changed, 72 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
index 465d294703f5..399cc59320d1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -137,6 +137,8 @@ vbus5v0_typec: vbus5v0-typec-regulator {
 		gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&typec5v_pwren>;
+		regulator-always-on;
+		regulator-boot-on;
 		regulator-name = "vbus5v0_typec";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
@@ -381,11 +383,34 @@ connector {
 			compatible = "usb-c-connector";
 			data-role = "dual";
 			label = "USB-C";
-			power-role = "dual";
-			try-power-role = "sink";
+			power-role = "source";
 			source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
-			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
-			op-sink-microwatt = <1000000>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					usbc0_hs: endpoint {
+						remote-endpoint = <&usb_host0_xhci_drd_sw>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					usbc0_ss: endpoint {
+						remote-endpoint = <&usbdp_phy0_typec_ss>;
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+					usbc0_sbu: endpoint {
+						remote-endpoint = <&usbdp_phy0_typec_sbu>;
+					};
+				};
+			};
 		};
 	};
 
@@ -928,6 +953,14 @@ &uart2 {
 	status = "okay";
 };
 
+&u2phy0 {
+	status = "okay";
+};
+
+&u2phy0_otg {
+	status = "okay";
+};
+
 &u2phy2_host {
 	phy-supply = <&vdd_4g_3v3>;
 	status = "okay";
@@ -945,6 +978,29 @@ &u2phy3 {
 	status = "okay";
 };
 
+&usbdp_phy0 {
+	mode-switch;
+	orientation-switch;
+	sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+	sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+
+	port {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		usbdp_phy0_typec_ss: endpoint@0 {
+			reg = <0>;
+			remote-endpoint = <&usbc0_ss>;
+		};
+
+		usbdp_phy0_typec_sbu: endpoint@1 {
+			reg = <1>;
+			remote-endpoint = <&usbc0_sbu>;
+		};
+	};
+};
+
 &usb_host0_ehci {
 	status = "okay";
 };
@@ -953,6 +1009,18 @@ &usb_host0_ohci {
 	status = "okay";
 };
 
+&usb_host0_xhci {
+	dr_mode = "host";
+	status = "okay";
+	usb-role-switch;
+
+	port {
+		usb_host0_xhci_drd_sw: endpoint {
+			remote-endpoint = <&usbc0_hs>;
+		};
+	};
+};
+
 &usb_host1_ehci {
 	status = "okay";
 };

-- 
2.46.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 7/7] arm64: dts: rockchip: add Mask Rom key on NanoPC-T6
  2024-08-26  8:02 [PATCH v5 0/7] FriendlyELEC NanoPC-T6 improvements Marcin Juszkiewicz
                   ` (5 preceding siblings ...)
  2024-08-26  8:02 ` [PATCH v5 6/7] arm64: dts: rockchip: enable USB-C " Marcin Juszkiewicz
@ 2024-08-26  8:02 ` Marcin Juszkiewicz
  6 siblings, 0 replies; 10+ messages in thread
From: Marcin Juszkiewicz @ 2024-08-26  8:02 UTC (permalink / raw)
  To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-rockchip, devicetree, Jonas Karlman, Marcin Juszkiewicz

Mask Rom key is connected to SARADC and can be read from OS.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
index 399cc59320d1..d5c4b2b351ed 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -8,6 +8,7 @@
 /dts-v1/;
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/usb/pd.h>
 #include "rk3588.dtsi"
@@ -21,6 +22,20 @@ aliases {
 		mmc1 = &sdmmc;
 	};
 
+	adc-keys-0 {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		poll-interval = <100>;
+
+		button-maskrom {
+			label = "Mask Rom";
+			linux,code = <KEY_SETUP>;
+			press-threshold-microvolt = <2000>;
+		};
+	};
+
 	chosen {
 		stdout-path = "serial2:1500000n8";
 	};

-- 
2.46.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 2/7] arm64: dts: rockchip: add NanoPC-T6 LTS
  2024-08-26  8:02 ` [PATCH v5 2/7] arm64: dts: rockchip: add " Marcin Juszkiewicz
@ 2024-08-26 10:52   ` Diederik de Haas
  2024-08-28 17:06   ` Heiko Stübner
  1 sibling, 0 replies; 10+ messages in thread
From: Diederik de Haas @ 2024-08-26 10:52 UTC (permalink / raw)
  To: Marcin Juszkiewicz, Heiko Stuebner, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-rockchip, devicetree, Jonas Karlman


[-- Attachment #1.1: Type: text/plain, Size: 1875 bytes --]

On Mon Aug 26, 2024 at 10:02 AM CEST, Marcin Juszkiewicz wrote:
> FriendlyELEC introduced a second version of NanoPC-T6 SBC.
>
> Create common include file and separate DT files for each version of the
> board.
>
> In the LTS version the miniPCIe slot got removed and USB 2.0 setup has
> changed. There are two external accessible ports and two ports on the
> internal header.
>
> There is an on-board USB hub which provides:
> - one external connector (bottom one)
> - two internal ports on pin header
> - one port for m.2 E connector
>
> The top USB 2.0 connector comes directly from the SoC.
>
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
> ---
>  arch/arm64/boot/dts/rockchip/Makefile              |   1 +
>  .../boot/dts/rockchip/rk3588-nanopc-t6-lts.dts     |  61 ++
>  arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts  | 910 +--------------------
>  ...{rk3588-nanopc-t6.dts => rk3588-nanopc-t6.dtsi} |  16 -
>  4 files changed, 66 insertions(+), 922 deletions(-)

Would it be useful to split this patch up as follows?
- Move common parts to dtsi and update the non-lts version to use that
- Improve the dtsi file (optionally)
- Improve the non-lts dts file (optionally)
- Add the lts version

> ...
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
> index ad8e36a339dc..2a2dc77c71b1 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
> ...
> -&uart2 {
> -	pinctrl-0 = <&uart2m0_xfer>;
> -	status = "okay";
> -};
> -
> +/* USB 2.0 in minipcie slot */
>  &u2phy2_host {
>  	phy-supply = <&vdd_4g_3v3>;
>  	status = "okay";
>  };

I like comments like these, but I wonder if such things don't make the
diff (way) larger then needed.

Cheers,
  Diederik

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 170 bytes --]

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 2/7] arm64: dts: rockchip: add NanoPC-T6 LTS
  2024-08-26  8:02 ` [PATCH v5 2/7] arm64: dts: rockchip: add " Marcin Juszkiewicz
  2024-08-26 10:52   ` Diederik de Haas
@ 2024-08-28 17:06   ` Heiko Stübner
  1 sibling, 0 replies; 10+ messages in thread
From: Heiko Stübner @ 2024-08-28 17:06 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Marcin Juszkiewicz
  Cc: linux-rockchip, devicetree, Jonas Karlman, Marcin Juszkiewicz

Am Montag, 26. August 2024, 10:02:46 CEST schrieb Marcin Juszkiewicz:
> FriendlyELEC introduced a second version of NanoPC-T6 SBC.
> 
> Create common include file and separate DT files for each version of the
> board.
> 
> In the LTS version the miniPCIe slot got removed and USB 2.0 setup has
> changed. There are two external accessible ports and two ports on the
> internal header.
> 
> There is an on-board USB hub which provides:
> - one external connector (bottom one)
> - two internal ports on pin header
> - one port for m.2 E connector
> 
> The top USB 2.0 connector comes directly from the SoC.
> 
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

So as Diederik already mentioned, this definitly needs to be split up.
Simply because it's hard to read and make verify that nothing slipped in.

So please the move from dts to dtsi should be its own separate patch
and a second patch then can add the "lts" devicetree on top.


Heiko

> ---
>  arch/arm64/boot/dts/rockchip/Makefile              |   1 +
>  .../boot/dts/rockchip/rk3588-nanopc-t6-lts.dts     |  61 ++
>  arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts  | 910 +--------------------
>  ...{rk3588-nanopc-t6.dts => rk3588-nanopc-t6.dtsi} |  16 -
>  4 files changed, 66 insertions(+), 922 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index fda1b980eb4b..0f982c741243 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -128,6 +128,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts
> new file mode 100644
> index 000000000000..fc465957a00b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts
> @@ -0,0 +1,61 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + * Copyright (c) 2023 Thomas McKahan
> + * Copyright (c) 2024 Linaro Ltd.
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include "rk3588-nanopc-t6.dtsi"
> +
> +/ {
> +	model = "FriendlyElec NanoPC-T6 LTS";
> +	compatible = "friendlyarm,nanopc-t6-lts", "rockchip,rk3588";
> +
> +	/* provide power for on-board USB 2.0 hub */
> +	vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {
> +		compatible = "regulator-fixed";
> +		enable-active-high;
> +		gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
> +		pinctrl-0 = <&usb20_host_pwren>;
> +		pinctrl-names = "default";
> +		regulator-always-on;
> +		regulator-boot-on;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-min-microvolt = <5000000>;
> +		regulator-name = "vcc5v0_usb20_host";
> +		vin-supply = <&vcc5v0_sys>;
> +	};
> +};
> +
> +&pinctrl {
> +	usb {
> +		usb20_host_pwren: usb20-host-pwren {
> +			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
> +		};
> +	};
> +};
> +
> +&u2phy1 {
> +	status = "okay";
> +};
> +
> +&u2phy1_otg {
> +	status = "okay";
> +};
> +
> +&u2phy2_host {
> +	phy-supply = <&vcc5v0_usb20_host>;
> +	status = "okay";
> +};
> +
> +&usbdp_phy1 {
> +	status = "okay";
> +};
> +
> +&usb_host1_xhci {
> +	dr_mode = "host";
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
> index ad8e36a339dc..2a2dc77c71b1 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
> @@ -2,175 +2,19 @@
>  /*
>   * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
>   * Copyright (c) 2023 Thomas McKahan
> + * Copyright (c) 2024 Linaro Ltd.
>   *
>   */
>  
>  /dts-v1/;
>  
> -#include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/pinctrl/rockchip.h>
> -#include <dt-bindings/usb/pd.h>
> -#include "rk3588.dtsi"
> +#include "rk3588-nanopc-t6.dtsi"
>  
>  / {
>  	model = "FriendlyElec NanoPC-T6";
>  	compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588";
>  
> -	aliases {
> -		mmc0 = &sdhci;
> -		mmc1 = &sdmmc;
> -	};
> -
> -	chosen {
> -		stdout-path = "serial2:1500000n8";
> -	};
> -
> -	leds {
> -		compatible = "gpio-leds";
> -
> -		sys_led: led-0 {
> -			gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
> -			label = "system-led";
> -			linux,default-trigger = "heartbeat";
> -			pinctrl-names = "default";
> -			pinctrl-0 = <&sys_led_pin>;
> -		};
> -
> -		usr_led: led-1 {
> -			gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
> -			label = "user-led";
> -			pinctrl-names = "default";
> -			pinctrl-0 = <&usr_led_pin>;
> -		};
> -	};
> -
> -	sound {
> -		compatible = "simple-audio-card";
> -		pinctrl-names = "default";
> -		pinctrl-0 = <&hp_det>;
> -
> -		simple-audio-card,name = "realtek,rt5616-codec";
> -		simple-audio-card,format = "i2s";
> -		simple-audio-card,mclk-fs = <256>;
> -
> -		simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
> -		simple-audio-card,hp-pin-name = "Headphones";
> -
> -		simple-audio-card,widgets =
> -			"Headphone", "Headphones",
> -			"Microphone", "Microphone Jack";
> -		simple-audio-card,routing =
> -			"Headphones", "HPOL",
> -			"Headphones", "HPOR",
> -			"MIC1", "Microphone Jack",
> -			"Microphone Jack", "micbias1";
> -
> -		simple-audio-card,cpu {
> -			sound-dai = <&i2s0_8ch>;
> -		};
> -		simple-audio-card,codec {
> -			sound-dai = <&rt5616>;
> -		};
> -	};
> -
> -	vcc12v_dcin: vcc12v-dcin-regulator {
> -		compatible = "regulator-fixed";
> -		regulator-name = "vcc12v_dcin";
> -		regulator-always-on;
> -		regulator-boot-on;
> -		regulator-min-microvolt = <12000000>;
> -		regulator-max-microvolt = <12000000>;
> -	};
> -
> -	/* vcc5v0_sys powers peripherals */
> -	vcc5v0_sys: vcc5v0-sys-regulator {
> -		compatible = "regulator-fixed";
> -		regulator-name = "vcc5v0_sys";
> -		regulator-always-on;
> -		regulator-boot-on;
> -		regulator-min-microvolt = <5000000>;
> -		regulator-max-microvolt = <5000000>;
> -		vin-supply = <&vcc12v_dcin>;
> -	};
> -
> -	/* vcc4v0_sys powers the RK806, RK860's */
> -	vcc4v0_sys: vcc4v0-sys-regulator {
> -		compatible = "regulator-fixed";
> -		regulator-name = "vcc4v0_sys";
> -		regulator-always-on;
> -		regulator-boot-on;
> -		regulator-min-microvolt = <4000000>;
> -		regulator-max-microvolt = <4000000>;
> -		vin-supply = <&vcc12v_dcin>;
> -	};
> -
> -	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
> -		compatible = "regulator-fixed";
> -		regulator-name = "vcc-1v1-nldo-s3";
> -		regulator-always-on;
> -		regulator-boot-on;
> -		regulator-min-microvolt = <1100000>;
> -		regulator-max-microvolt = <1100000>;
> -		vin-supply = <&vcc4v0_sys>;
> -	};
> -
> -	vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
> -		compatible = "regulator-fixed";
> -		regulator-name = "vcc_3v3_pcie20";
> -		regulator-always-on;
> -		regulator-boot-on;
> -		regulator-min-microvolt = <3300000>;
> -		regulator-max-microvolt = <3300000>;
> -		vin-supply = <&vcc_3v3_s3>;
> -	};
> -
> -	vbus5v0_typec: vbus5v0-typec-regulator {
> -		compatible = "regulator-fixed";
> -		enable-active-high;
> -		gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
> -		pinctrl-names = "default";
> -		pinctrl-0 = <&typec5v_pwren>;
> -		regulator-name = "vbus5v0_typec";
> -		regulator-min-microvolt = <5000000>;
> -		regulator-max-microvolt = <5000000>;
> -		vin-supply = <&vcc5v0_sys>;
> -	};
> -
> -	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
> -		compatible = "regulator-fixed";
> -		enable-active-high;
> -		gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
> -		pinctrl-names = "default";
> -		pinctrl-0 = <&pcie_m2_1_pwren>;
> -		regulator-name = "vcc3v3_pcie2x1l0";
> -		regulator-min-microvolt = <3300000>;
> -		regulator-max-microvolt = <3300000>;
> -		vin-supply = <&vcc5v0_sys>;
> -	};
> -
> -	vcc3v3_pcie30: vcc3v3-pcie30-regulator {
> -		compatible = "regulator-fixed";
> -		enable-active-high;
> -		gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
> -		pinctrl-names = "default";
> -		pinctrl-0 = <&pcie_m2_0_pwren>;
> -		regulator-name = "vcc3v3_pcie30";
> -		regulator-min-microvolt = <3300000>;
> -		regulator-max-microvolt = <3300000>;
> -		vin-supply = <&vcc5v0_sys>;
> -	};
> -
> -	vcc3v3_sd_s0: vcc3v3-sd-s0-regulator {
> -		compatible = "regulator-fixed";
> -		enable-active-low;
> -		gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>;
> -		regulator-boot-on;
> -		regulator-max-microvolt = <3300000>;
> -		regulator-min-microvolt = <3300000>;
> -		regulator-name = "vcc3v3_sd_s0";
> -		vin-supply = <&vcc_3v3_s3>;
> -	};
> -
> +	/* provide power for minipcie slot */
>  	vdd_4g_3v3: vdd-4g-3v3-regulator {
>  		compatible = "regulator-fixed";
>  		enable-active-high;
> @@ -184,762 +28,16 @@ vdd_4g_3v3: vdd-4g-3v3-regulator {
>  	};
>  };
>  
> -&combphy0_ps {
> -	status = "okay";
> -};
> -
> -&combphy1_ps {
> -	status = "okay";
> -};
> -
> -&combphy2_psu {
> -	status = "okay";
> -};
> -
> -&cpu_l0 {
> -	cpu-supply = <&vdd_cpu_lit_s0>;
> -};
> -
> -&cpu_l1 {
> -	cpu-supply = <&vdd_cpu_lit_s0>;
> -};
> -
> -&cpu_l2 {
> -	cpu-supply = <&vdd_cpu_lit_s0>;
> -};
> -
> -&cpu_l3 {
> -	cpu-supply = <&vdd_cpu_lit_s0>;
> -};
> -
> -&cpu_b0 {
> -	cpu-supply = <&vdd_cpu_big0_s0>;
> -};
> -
> -&cpu_b1 {
> -	cpu-supply = <&vdd_cpu_big0_s0>;
> -};
> -
> -&cpu_b2 {
> -	cpu-supply = <&vdd_cpu_big1_s0>;
> -};
> -
> -&cpu_b3 {
> -	cpu-supply = <&vdd_cpu_big1_s0>;
> -};
> -
> -&gpio0 {
> -	gpio-line-names = /* GPIO0 A0-A7 */
> -			  "", "", "", "",
> -			  "", "", "", "",
> -			  /* GPIO0 B0-B7 */
> -			  "", "", "", "",
> -			  "", "", "", "",
> -			  /* GPIO0 C0-C7 */
> -			  "", "", "", "",
> -			  "HEADER_10", "HEADER_08", "HEADER_32", "",
> -			  /* GPIO0 D0-D7 */
> -			  "", "", "", "",
> -			  "", "", "", "";
> -};
> -
> -&gpio1 {
> -	gpio-line-names = /* GPIO1 A0-A7 */
> -			  "HEADER_27", "HEADER_28", "", "",
> -			  "", "", "", "HEADER_15",
> -			  /* GPIO1 B0-B7 */
> -			  "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23",
> -			  "HEADER_24", "HEADER_22", "", "",
> -			  /* GPIO1 C0-C7 */
> -			  "", "", "", "",
> -			  "", "", "", "",
> -			  /* GPIO1 D0-D7 */
> -			  "", "", "", "",
> -			  "", "", "HEADER_05", "HEADER_03";
> -};
> -
> -&gpio2 {
> -	gpio-line-names = /* GPIO2 A0-A7 */
> -			  "", "", "", "",
> -			  "", "", "", "",
> -			  /* GPIO2 B0-B7 */
> -			  "", "", "", "",
> -			  "", "", "", "",
> -			  /* GPIO2 C0-C7 */
> -			  "", "CSI1_11", "CSI1_12", "",
> -			  "", "", "", "",
> -			  /* GPIO2 D0-D7 */
> -			  "", "", "", "",
> -			  "", "", "", "";
> -};
> -
> -&gpio3 {
> -	gpio-line-names = /* GPIO3 A0-A7 */
> -			  "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36",
> -			  "HEADER_37", "", "DSI0_12", "",
> -			  /* GPIO3 B0-B7 */
> -			  "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16",
> -			  "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12",
> -			  /* GPIO3 C0-C7 */
> -			  "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13",
> -			  "", "", "", "",
> -			  /* GPIO3 D0-D7 */
> -			  "", "", "", "",
> -			  "", "DSI1_10", "", "";
> -};
> -
> -&gpio4 {
> -	gpio-line-names = /* GPIO4 A0-A7 */
> -			  "DSI1_08", "DSI1_14", "", "DSI1_12",
> -			  "", "", "", "",
> -			  /* GPIO4 B0-B7 */
> -			  "", "", "", "",
> -			  "", "", "", "",
> -			  /* GPIO4 C0-C7 */
> -			  "", "", "", "",
> -			  "CSI0_11", "CSI0_12", "", "",
> -			  /* GPIO4 D0-D7 */
> -			  "", "", "", "",
> -			  "", "", "", "";
> -};
> -
> -&i2c0 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&i2c0m2_xfer>;
> -	status = "okay";
> -
> -	vdd_cpu_big0_s0: regulator@42 {
> -		compatible = "rockchip,rk8602";
> -		reg = <0x42>;
> -		fcs,suspend-voltage-selector = <1>;
> -		regulator-name = "vdd_cpu_big0_s0";
> -		regulator-always-on;
> -		regulator-boot-on;
> -		regulator-min-microvolt = <550000>;
> -		regulator-max-microvolt = <1050000>;
> -		regulator-ramp-delay = <2300>;
> -		vin-supply = <&vcc4v0_sys>;
> -
> -		regulator-state-mem {
> -			regulator-off-in-suspend;
> -		};
> -	};
> -
> -	vdd_cpu_big1_s0: regulator@43 {
> -		compatible = "rockchip,rk8603", "rockchip,rk8602";
> -		reg = <0x43>;
> -		fcs,suspend-voltage-selector = <1>;
> -		regulator-name = "vdd_cpu_big1_s0";
> -		regulator-always-on;
> -		regulator-boot-on;
> -		regulator-min-microvolt = <550000>;
> -		regulator-max-microvolt = <1050000>;
> -		regulator-ramp-delay = <2300>;
> -		vin-supply = <&vcc4v0_sys>;
> -
> -		regulator-state-mem {
> -			regulator-off-in-suspend;
> -		};
> -	};
> -};
> -
> -&i2c2 {
> -	status = "okay";
> -
> -	vdd_npu_s0: regulator@42 {
> -		compatible = "rockchip,rk8602";
> -		reg = <0x42>;
> -		rockchip,suspend-voltage-selector = <1>;
> -		regulator-name = "vdd_npu_s0";
> -		regulator-always-on;
> -		regulator-boot-on;
> -		regulator-min-microvolt = <550000>;
> -		regulator-max-microvolt = <950000>;
> -		regulator-ramp-delay = <2300>;
> -		vin-supply = <&vcc4v0_sys>;
> -
> -		regulator-state-mem {
> -			regulator-off-in-suspend;
> -		};
> -	};
> -};
> -
> -&i2c6 {
> -	clock-frequency = <200000>;
> -	status = "okay";
> -
> -	fusb302: typec-portc@22 {
> -		compatible = "fcs,fusb302";
> -		reg = <0x22>;
> -		interrupt-parent = <&gpio0>;
> -		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
> -		pinctrl-0 = <&usbc0_int>;
> -		pinctrl-names = "default";
> -		vbus-supply = <&vbus5v0_typec>;
> -
> -		connector {
> -			compatible = "usb-c-connector";
> -			data-role = "dual";
> -			label = "USB-C";
> -			power-role = "dual";
> -			try-power-role = "sink";
> -			source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
> -			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> -			op-sink-microwatt = <1000000>;
> -		};
> -	};
> -
> -	hym8563: rtc@51 {
> -		compatible = "haoyu,hym8563";
> -		reg = <0x51>;
> -		#clock-cells = <0>;
> -		clock-output-names = "hym8563";
> -		pinctrl-names = "default";
> -		pinctrl-0 = <&hym8563_int>;
> -		interrupt-parent = <&gpio0>;
> -		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
> -		wakeup-source;
> -	};
> -};
> -
> -&i2c7 {
> -	clock-frequency = <200000>;
> -	status = "okay";
> -
> -	rt5616: codec@1b {
> -		compatible = "realtek,rt5616";
> -		reg = <0x1b>;
> -		clocks = <&cru I2S0_8CH_MCLKOUT>;
> -		clock-names = "mclk";
> -		#sound-dai-cells = <0>;
> -		assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
> -		assigned-clock-rates = <12288000>;
> -
> -		port {
> -			rt5616_p0_0: endpoint {
> -				remote-endpoint = <&i2s0_8ch_p0_0>;
> -			};
> -		};
> -	};
> -
> -	/* connected with MIPI-CSI1 */
> -};
> -
> -&i2c8 {
> -	pinctrl-0 = <&i2c8m2_xfer>;
> -};
> -
> -&i2s0_8ch {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&i2s0_lrck
> -		     &i2s0_mclk
> -		     &i2s0_sclk
> -		     &i2s0_sdi0
> -		     &i2s0_sdo0>;
> -	status = "okay";
> -
> -	i2s0_8ch_p0: port {
> -		i2s0_8ch_p0_0: endpoint {
> -			dai-format = "i2s";
> -			mclk-fs = <256>;
> -			remote-endpoint = <&rt5616_p0_0>;
> -		};
> -	};
> -};
> -
> -&pcie2x1l0 {
> -	reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
> -	vpcie3v3-supply = <&vcc_3v3_pcie20>;
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pcie2_0_rst>;
> -	status = "okay";
> -};
> -
> -&pcie2x1l1 {
> -	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
> -	vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pcie2_1_rst>;
> -	status = "okay";
> -};
> -
> -&pcie2x1l2 {
> -	reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
> -	vpcie3v3-supply = <&vcc_3v3_pcie20>;
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pcie2_2_rst>;
> -	status = "okay";
> -};
> -
> -&pcie30phy {
> -	status = "okay";
> -};
> -
> -&pcie3x4 {
> -	reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
> -	vpcie3v3-supply = <&vcc3v3_pcie30>;
> -	status = "okay";
> -};
> -
>  &pinctrl {
> -	gpio-leds {
> -		sys_led_pin: sys-led-pin {
> -			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -
> -		usr_led_pin: usr-led-pin {
> -			rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -	};
> -
> -	headphone {
> -		hp_det: hp-det {
> -			rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -	};
> -
> -	hym8563 {
> -		hym8563_int: hym8563-int {
> -			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
> -		};
> -	};
> -
> -	pcie {
> -		pcie2_0_rst: pcie2-0-rst {
> -			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -
> -		pcie2_1_rst: pcie2-1-rst {
> -			rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -
> -		pcie2_2_rst: pcie2-2-rst {
> -			rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -
> -		pcie_m2_0_pwren: pcie-m20-pwren {
> -			rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -
> -		pcie_m2_1_pwren: pcie-m21-pwren {
> -			rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -	};
> -
>  	usb {
>  		pin_4g_lte_pwren: 4g-lte-pwren {
>  			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
>  		};
> -
> -		typec5v_pwren: typec5v-pwren {
> -			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -
> -		usbc0_int: usbc0-int {
> -			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
> -		};
>  	};
>  };
>  
> -&pwm1 {
> -	pinctrl-0 = <&pwm1m1_pins>;
> -	status = "okay";
> -};
> -
> -&saradc {
> -	vref-supply = <&avcc_1v8_s0>;
> -	status = "okay";
> -};
> -
> -&sdhci {
> -	bus-width = <8>;
> -	no-sdio;
> -	no-sd;
> -	non-removable;
> -	max-frequency = <200000000>;
> -	mmc-hs400-1_8v;
> -	mmc-hs400-enhanced-strobe;
> -	status = "okay";
> -};
> -
> -&sdmmc {
> -	bus-width = <4>;
> -	cap-mmc-highspeed;
> -	cap-sd-highspeed;
> -	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
> -	disable-wp;
> -	no-mmc;
> -	no-sdio;
> -	sd-uhs-sdr104;
> -	vmmc-supply = <&vcc3v3_sd_s0>;
> -	vqmmc-supply = <&vccio_sd_s0>;
> -	status = "okay";
> -};
> -
> -&spi2 {
> -	status = "okay";
> -	assigned-clocks = <&cru CLK_SPI2>;
> -	assigned-clock-rates = <200000000>;
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
> -	num-cs = <1>;
> -
> -	pmic@0 {
> -		compatible = "rockchip,rk806";
> -		spi-max-frequency = <1000000>;
> -		reg = <0x0>;
> -
> -		interrupt-parent = <&gpio0>;
> -		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> -
> -		pinctrl-names = "default";
> -		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
> -			    <&rk806_dvs2_null>, <&rk806_dvs3_null>;
> -
> -		system-power-controller;
> -
> -		vcc1-supply = <&vcc4v0_sys>;
> -		vcc2-supply = <&vcc4v0_sys>;
> -		vcc3-supply = <&vcc4v0_sys>;
> -		vcc4-supply = <&vcc4v0_sys>;
> -		vcc5-supply = <&vcc4v0_sys>;
> -		vcc6-supply = <&vcc4v0_sys>;
> -		vcc7-supply = <&vcc4v0_sys>;
> -		vcc8-supply = <&vcc4v0_sys>;
> -		vcc9-supply = <&vcc4v0_sys>;
> -		vcc10-supply = <&vcc4v0_sys>;
> -		vcc11-supply = <&vcc_2v0_pldo_s3>;
> -		vcc12-supply = <&vcc4v0_sys>;
> -		vcc13-supply = <&vcc_1v1_nldo_s3>;
> -		vcc14-supply = <&vcc_1v1_nldo_s3>;
> -		vcca-supply = <&vcc4v0_sys>;
> -
> -		gpio-controller;
> -		#gpio-cells = <2>;
> -
> -		rk806_dvs1_null: dvs1-null-pins {
> -			pins = "gpio_pwrctrl1";
> -			function = "pin_fun0";
> -		};
> -
> -		rk806_dvs2_null: dvs2-null-pins {
> -			pins = "gpio_pwrctrl2";
> -			function = "pin_fun0";
> -		};
> -
> -		rk806_dvs3_null: dvs3-null-pins {
> -			pins = "gpio_pwrctrl3";
> -			function = "pin_fun0";
> -		};
> -
> -		regulators {
> -			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
> -				regulator-boot-on;
> -				regulator-min-microvolt = <550000>;
> -				regulator-max-microvolt = <950000>;
> -				regulator-ramp-delay = <12500>;
> -				regulator-name = "vdd_gpu_s0";
> -				regulator-enable-ramp-delay = <400>;
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <550000>;
> -				regulator-max-microvolt = <950000>;
> -				regulator-ramp-delay = <12500>;
> -				regulator-name = "vdd_cpu_lit_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			vdd_log_s0: dcdc-reg3 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <675000>;
> -				regulator-max-microvolt = <750000>;
> -				regulator-ramp-delay = <12500>;
> -				regulator-name = "vdd_log_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -					regulator-suspend-microvolt = <750000>;
> -				};
> -			};
> -
> -			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <550000>;
> -				regulator-max-microvolt = <950000>;
> -				regulator-init-microvolt = <750000>;
> -				regulator-ramp-delay = <12500>;
> -				regulator-name = "vdd_vdenc_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			vdd_ddr_s0: dcdc-reg5 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <675000>;
> -				regulator-max-microvolt = <900000>;
> -				regulator-ramp-delay = <12500>;
> -				regulator-name = "vdd_ddr_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -					regulator-suspend-microvolt = <850000>;
> -				};
> -			};
> -
> -			vdd2_ddr_s3: dcdc-reg6 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-name = "vdd2_ddr_s3";
> -
> -				regulator-state-mem {
> -					regulator-on-in-suspend;
> -				};
> -			};
> -
> -			vcc_2v0_pldo_s3: dcdc-reg7 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <2000000>;
> -				regulator-max-microvolt = <2000000>;
> -				regulator-ramp-delay = <12500>;
> -				regulator-name = "vdd_2v0_pldo_s3";
> -
> -				regulator-state-mem {
> -					regulator-on-in-suspend;
> -					regulator-suspend-microvolt = <2000000>;
> -				};
> -			};
> -
> -			vcc_3v3_s3: dcdc-reg8 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <3300000>;
> -				regulator-max-microvolt = <3300000>;
> -				regulator-name = "vcc_3v3_s3";
> -
> -				regulator-state-mem {
> -					regulator-on-in-suspend;
> -					regulator-suspend-microvolt = <3300000>;
> -				};
> -			};
> -
> -			vddq_ddr_s0: dcdc-reg9 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-name = "vddq_ddr_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			vcc_1v8_s3: dcdc-reg10 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <1800000>;
> -				regulator-max-microvolt = <1800000>;
> -				regulator-name = "vcc_1v8_s3";
> -
> -				regulator-state-mem {
> -					regulator-on-in-suspend;
> -					regulator-suspend-microvolt = <1800000>;
> -				};
> -			};
> -
> -			avcc_1v8_s0: pldo-reg1 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <1800000>;
> -				regulator-max-microvolt = <1800000>;
> -				regulator-name = "avcc_1v8_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			vcc_1v8_s0: pldo-reg2 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <1800000>;
> -				regulator-max-microvolt = <1800000>;
> -				regulator-name = "vcc_1v8_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -					regulator-suspend-microvolt = <1800000>;
> -				};
> -			};
> -
> -			avdd_1v2_s0: pldo-reg3 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <1200000>;
> -				regulator-max-microvolt = <1200000>;
> -				regulator-name = "avdd_1v2_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			vcc_3v3_s0: pldo-reg4 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <3300000>;
> -				regulator-max-microvolt = <3300000>;
> -				regulator-ramp-delay = <12500>;
> -				regulator-name = "vcc_3v3_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			vccio_sd_s0: pldo-reg5 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <1800000>;
> -				regulator-max-microvolt = <3300000>;
> -				regulator-ramp-delay = <12500>;
> -				regulator-name = "vccio_sd_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			pldo6_s3: pldo-reg6 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <1800000>;
> -				regulator-max-microvolt = <1800000>;
> -				regulator-name = "pldo6_s3";
> -
> -				regulator-state-mem {
> -					regulator-on-in-suspend;
> -					regulator-suspend-microvolt = <1800000>;
> -				};
> -			};
> -
> -			vdd_0v75_s3: nldo-reg1 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <750000>;
> -				regulator-max-microvolt = <750000>;
> -				regulator-name = "vdd_0v75_s3";
> -
> -				regulator-state-mem {
> -					regulator-on-in-suspend;
> -					regulator-suspend-microvolt = <750000>;
> -				};
> -			};
> -
> -			vdd_ddr_pll_s0: nldo-reg2 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <850000>;
> -				regulator-max-microvolt = <850000>;
> -				regulator-name = "vdd_ddr_pll_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -					regulator-suspend-microvolt = <850000>;
> -				};
> -			};
> -
> -			avdd_0v75_s0: nldo-reg3 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <750000>;
> -				regulator-max-microvolt = <750000>;
> -				regulator-name = "avdd_0v75_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			vdd_0v85_s0: nldo-reg4 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <850000>;
> -				regulator-max-microvolt = <850000>;
> -				regulator-name = "vdd_0v85_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -
> -			vdd_0v75_s0: nldo-reg5 {
> -				regulator-always-on;
> -				regulator-boot-on;
> -				regulator-min-microvolt = <750000>;
> -				regulator-max-microvolt = <750000>;
> -				regulator-name = "vdd_0v75_s0";
> -
> -				regulator-state-mem {
> -					regulator-off-in-suspend;
> -				};
> -			};
> -		};
> -	};
> -};
> -
> -&tsadc {
> -	status = "okay";
> -};
> -
> -&uart2 {
> -	pinctrl-0 = <&uart2m0_xfer>;
> -	status = "okay";
> -};
> -
> +/* USB 2.0 in minipcie slot */
>  &u2phy2_host {
>  	phy-supply = <&vdd_4g_3v3>;
>  	status = "okay";
>  };
> -
> -&u2phy3_host {
> -	status = "okay";
> -};
> -
> -&u2phy2 {
> -	status = "okay";
> -};
> -
> -&u2phy3 {
> -	status = "okay";
> -};
> -
> -&usb_host0_ehci {
> -	status = "okay";
> -};
> -
> -&usb_host0_ohci {
> -	status = "okay";
> -};
> -
> -&usb_host1_ehci {
> -	status = "okay";
> -};
> -
> -&usb_host1_ohci {
> -	status = "okay";
> -};
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> similarity index 97%
> copy from arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
> copy to arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> index ad8e36a339dc..ce0db9b8b126 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
> @@ -170,18 +170,6 @@ vcc3v3_sd_s0: vcc3v3-sd-s0-regulator {
>  		regulator-name = "vcc3v3_sd_s0";
>  		vin-supply = <&vcc_3v3_s3>;
>  	};
> -
> -	vdd_4g_3v3: vdd-4g-3v3-regulator {
> -		compatible = "regulator-fixed";
> -		enable-active-high;
> -		gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
> -		pinctrl-names = "default";
> -		pinctrl-0 = <&pin_4g_lte_pwren>;
> -		regulator-name = "vdd_4g_3v3";
> -		regulator-min-microvolt = <3300000>;
> -		regulator-max-microvolt = <3300000>;
> -		vin-supply = <&vcc5v0_sys>;
> -	};
>  };
>  
>  &combphy0_ps {
> @@ -527,10 +515,6 @@ pcie_m2_1_pwren: pcie-m21-pwren {
>  	};
>  
>  	usb {
> -		pin_4g_lte_pwren: 4g-lte-pwren {
> -			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
> -		};
> -
>  		typec5v_pwren: typec5v-pwren {
>  			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
>  		};
> 
> 





_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2024-08-28 17:05 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-08-26  8:02 [PATCH v5 0/7] FriendlyELEC NanoPC-T6 improvements Marcin Juszkiewicz
2024-08-26  8:02 ` [PATCH v5 1/7] dt-bindings: arm: rockchip: Add NanoPC-T6 LTS Marcin Juszkiewicz
2024-08-26  8:02 ` [PATCH v5 2/7] arm64: dts: rockchip: add " Marcin Juszkiewicz
2024-08-26 10:52   ` Diederik de Haas
2024-08-28 17:06   ` Heiko Stübner
2024-08-26  8:02 ` [PATCH v5 3/7] arm64: dts: rockchip: add SPI flash on NanoPC-T6 Marcin Juszkiewicz
2024-08-26  8:02 ` [PATCH v5 4/7] arm64: dts: rockchip: add IR-receiver to NanoPC-T6 Marcin Juszkiewicz
2024-08-26  8:02 ` [PATCH v5 5/7] arm64: dts: rockchip: enable GPU on NanoPC-T6 Marcin Juszkiewicz
2024-08-26  8:02 ` [PATCH v5 6/7] arm64: dts: rockchip: enable USB-C " Marcin Juszkiewicz
2024-08-26  8:02 ` [PATCH v5 7/7] arm64: dts: rockchip: add Mask Rom key " Marcin Juszkiewicz

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).