From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Stuebner Subject: Re: [PATCH] clk: rockchip: Don't yell about bad mmc phases when getting Date: Thu, 09 May 2019 10:46:49 +0200 Message-ID: <3109854.2nZ1kdONIi@phil> References: <20190503212208.223232-1-dianders@chromium.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: <20190503212208.223232-1-dianders@chromium.org> Sender: linux-kernel-owner@vger.kernel.org To: Douglas Anderson Cc: Shawn Lin , hal@halemmerich.com, linux-rockchip@lists.infradead.org, mka@chromium.org, Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org Am Freitag, 3. Mai 2019, 23:22:08 CEST schrieb Douglas Anderson: > At boot time, my rk3288-veyron devices yell with 8 lines that look > like this: > [ 0.000000] rockchip_mmc_get_phase: invalid clk rate > > This is because the clock framework at clk_register() time tries to > get the phase but we don't have a parent yet. > > While the errors appear to be harmless they are still ugly and, in > general, we don't want yells like this in the log unless they are > important. > > There's no real reason to be yelling here. We can still return > -EINVAL to indicate that the phase makes no sense without a parent. > If someone really tries to do tuning and the clock is reported as 0 > then we'll see the yells in rockchip_mmc_set_phase(). > > Fixes: 4bf59902b500 ("clk: rockchip: Prevent calculating mmc phase if clock rate is zero") > Signed-off-by: Douglas Anderson applied for 5.3 Thanks Heiko