From: Nicolas Dufresne <nicolas.dufresne@collabora.com>
To: Benjamin Gaignard <benjamin.gaignard@collabora.com>,
ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de,
mchehab@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de,
hverkuil-cisco@xs4all.nl
Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@collabora.com
Subject: Re: [PATCH v5 06/13] media: verisilicon: Check AV1 bitstreams bit depth
Date: Tue, 11 Apr 2023 11:09:52 -0400 [thread overview]
Message-ID: <3352700c4545e9c8cc35fd698f17e52259f31c3b.camel@collabora.com> (raw)
In-Reply-To: <20230330154043.1250736-7-benjamin.gaignard@collabora.com>
Le jeudi 30 mars 2023 à 17:40 +0200, Benjamin Gaignard a écrit :
> The driver supports 8 and 10 bits bitstreams, make sure to discard
> other cases.
> It could happens that userland test if V4L2_CID_STATELESS_AV1_SEQUENCE
> exists without setting bit_depth field in this case use
> HANTRO_DEFAULT_BIT_DEPTH value.
>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
> ---
> .../media/platform/verisilicon/hantro_drv.c | 36 +++++++++++++++++++
> .../media/platform/verisilicon/hantro_v4l2.c | 4 +++
> 2 files changed, 40 insertions(+)
>
> diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
> index 74641c972f1e..71bd68e63859 100644
> --- a/drivers/media/platform/verisilicon/hantro_drv.c
> +++ b/drivers/media/platform/verisilicon/hantro_drv.c
> @@ -275,7 +275,13 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
> /* We only support profile 0 */
> if (dec_params->profile != 0)
> return -EINVAL;
> + } else if (ctrl->id == V4L2_CID_STATELESS_AV1_SEQUENCE) {
> + const struct v4l2_ctrl_av1_sequence *sequence = ctrl->p_new.p_av1_sequence;
> +
> + if (sequence->bit_depth != 8 && sequence->bit_depth != 10)
> + return -EINVAL;
> }
> +
> return 0;
> }
>
> @@ -346,6 +352,30 @@ static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl)
> return 0;
> }
>
> +static int hantro_av1_s_ctrl(struct v4l2_ctrl *ctrl)
> +{
> + struct hantro_ctx *ctx;
> +
> + ctx = container_of(ctrl->handler,
> + struct hantro_ctx, ctrl_handler);
> +
> + switch (ctrl->id) {
> + case V4L2_CID_STATELESS_AV1_SEQUENCE:
> + {
> + int bit_depth = ctrl->p_new.p_av1_sequence->bit_depth;
> +
> + if (ctx->bit_depth == bit_depth)
> + return 0;
> +
> + return hantro_reset_raw_fmt(ctx, bit_depth);
> + }
> + default:
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> static const struct v4l2_ctrl_ops hantro_ctrl_ops = {
> .try_ctrl = hantro_try_ctrl,
> };
> @@ -363,6 +393,11 @@ static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = {
> .s_ctrl = hantro_hevc_s_ctrl,
> };
>
> +static const struct v4l2_ctrl_ops hantro_av1_ctrl_ops = {
> + .try_ctrl = hantro_try_ctrl,
> + .s_ctrl = hantro_av1_s_ctrl,
> +};
> +
> #define HANTRO_JPEG_ACTIVE_MARKERS (V4L2_JPEG_ACTIVE_MARKER_APP0 | \
> V4L2_JPEG_ACTIVE_MARKER_COM | \
> V4L2_JPEG_ACTIVE_MARKER_DQT | \
> @@ -540,6 +575,7 @@ static const struct hantro_ctrl controls[] = {
> .codec = HANTRO_AV1_DECODER,
> .cfg = {
> .id = V4L2_CID_STATELESS_AV1_SEQUENCE,
> + .ops = &hantro_av1_ctrl_ops,
> },
> }, {
> .codec = HANTRO_AV1_DECODER,
> diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c
> index 7ed2dfd4aefa..e2a8838f75f0 100644
> --- a/drivers/media/platform/verisilicon/hantro_v4l2.c
> +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c
> @@ -86,6 +86,10 @@ hantro_check_depth_match(const struct hantro_fmt *fmt, int bit_depth)
> if (!fmt->match_depth && !fmt->postprocessed)
> return true;
>
> + /* 0 means default depth, which is 8 */
> + if (!bit_depth)
> + bit_depth = HANTRO_DEFAULT_BIT_DEPTH;
> +
> fmt_depth = hantro_get_format_depth(fmt->fourcc);
>
> /*
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next prev parent reply other threads:[~2023-04-11 15:10 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-30 15:40 [PATCH v5 00/13] AV1 stateless decoder for RK3588 Benjamin Gaignard
2023-03-30 15:40 ` [PATCH v5 01/13] dt-bindings: media: rockchip-vpu: Add rk3588 vpu compatible Benjamin Gaignard
2023-03-30 15:40 ` [PATCH v5 02/13] v4l2-common: Add support for fractional bpp Benjamin Gaignard
2023-03-30 15:40 ` [PATCH v5 03/13] media: Add NV12_10LE40_4L4 pixel format Benjamin Gaignard
2023-04-11 15:07 ` Nicolas Dufresne
2023-04-11 16:01 ` Nicolas Dufresne
2023-03-30 15:40 ` [PATCH v5 04/13] media: verisilicon: Get bit depth for V4L2_PIX_FMT_NV12_10LE40_4L4 Benjamin Gaignard
2023-04-11 15:08 ` Nicolas Dufresne
2023-03-30 15:40 ` [PATCH v5 05/13] media: verisilicon: Add AV1 decoder mode and controls Benjamin Gaignard
2023-03-30 15:40 ` [PATCH v5 06/13] media: verisilicon: Check AV1 bitstreams bit depth Benjamin Gaignard
2023-04-11 15:09 ` Nicolas Dufresne [this message]
2023-03-30 15:40 ` [PATCH v5 07/13] media: verisilicon: Compute motion vectors size for AV1 frames Benjamin Gaignard
2023-04-11 15:10 ` Nicolas Dufresne
2023-03-30 15:40 ` [PATCH v5 08/13] media: verisilicon: Add AV1 entropy helpers Benjamin Gaignard
2023-04-11 15:13 ` Nicolas Dufresne
2023-03-30 15:40 ` [PATCH v5 09/13] media: verisilicon: Add Rockchip AV1 decoder Benjamin Gaignard
2023-04-11 12:33 ` Hans Verkuil
2023-04-11 13:39 ` Benjamin Gaignard
2023-04-11 15:15 ` Nicolas Dufresne
2023-03-30 15:40 ` [PATCH v5 10/13] media: verisilicon: Add film grain feature to AV1 driver Benjamin Gaignard
2023-04-11 15:17 ` Nicolas Dufresne
2023-03-30 15:40 ` [PATCH v5 11/13] media: verisilicon: Enable AV1 decoder on rk3588 Benjamin Gaignard
2023-04-11 15:18 ` Nicolas Dufresne
2023-03-30 15:40 ` [PATCH v5 12/13] media: verisilicon: Conditionally ignore native formats Benjamin Gaignard
2023-04-11 15:25 ` Nicolas Dufresne
2023-03-30 15:40 ` [PATCH v5 13/13] media: AV1: Make sure that bit depth in correctly initialize Benjamin Gaignard
2023-04-11 15:26 ` Nicolas Dufresne
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