Re: [PATCH v3 4/6] phy: rockchip-typec: force to USB2 if DP at 4 lanes mode

Heiko Stuebner
2018-02-17T00:09:52Z

Am Freitag, 16. Februar 2018, 13:09:54 CET schrieb Enric Balletbo i Serra:
> From: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> The usb3tousb2_en BIT will be clear to 0 in probe(), it make USB
> controller work at USB3 mode, and if the USB phy is turned on with DP
> only mode(4 lanes DP), the rockchip_usb3_phy_power_on() will return
> directly, so usb3_host_disable and usb3_host_port these 2 BIT will keep
> a same value as coreboot. In coreboot, these 3 BITs are set as USB2
> mode, but now one of the bits is changed to USB3, it make USB controller
> work at a unknown status.
>
> These 3 BITs should be changed to USB2, if the Type-C works at 4 lanes
> mode, and then switch it back to USB3 mode, when USB disconnect.
>
> Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>

Reviewed-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
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