From: Yakir Yang <ykk@rock-chips.com>
To: Thierry Reding <treding@nvidia.com>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>,
seanpaul@google.com, dri-devel@lists.freedesktop.org,
Andrzej Hajda <a.hajda@samsung.com>,
Gustavo Padovan <gustavo.padovan@collabora.co.uk>,
Ajay Kumar <ajaykumar.rs@samsung.com>,
linux-arm-ker@NULL.NULL, linux-samsung-soc@vger.kernel.org,
Vincent Palatin <vpalatin@chromium.org>,
linux-rockchip@lists.infradead.org, Kukjin Kim <kgene@kernel.org>,
Russell King <rmk+kernel@arm.linux.org.uk>,
dianders@google.com, ajaynumb@gmail.com,
Fabio Estevam <fabio.estevam@freescale.com>,
nel@lists.infradead.org, Jingoo Han <jingoohan1@gmail.com>,
Seung-Woo Kim <sw0312.kim@samsung.com>,
linux-kernel@vger.kernel.org,
Kyungmin Park <kyungmin.park@samsung.com>,
djkurtz@google.com, joe@perches.com,
Andy Yan <andy.yan@rock-chips.com>
Subject: Re: [PATCH v2 4/8] drm: rockchip/dp: add rockchip platform dp driver
Date: Wed, 19 Aug 2015 18:23:39 +0800 [thread overview]
Message-ID: <55D4592B.2000704@rock-chips.com> (raw)
In-Reply-To: <20150810100055.GB7850@ulmo.nvidia.com>
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Hi Thierry
When I'm preparing v3 series, I meet some trobules from your comment,
wish you could give some advise? ;)
在 2015/8/10 18:00, Thierry Reding 写道:
> On Sat, Aug 08, 2015 at 11:54:38AM +0800, Yakir Yang wrote:
> [...]
>> edp: edp@ff970000 {
> [...]
>> samsung,color-space = <0>;
>> samsung,dynamic-range = <0>;
>> samsung,ycbcr-coeff = <0>;
> I think these should also come from EDID, though I'm not sure if we
> store this in internal data structures yet.
>
>> samsung,color-depth = <1>;
> This is probably drm_display_info.bpc.
"samsung,color_space" and "samsung,color-depth"
The drm_display_info's color_formats and bpc indicate the monitor
display ability, but
the edp driver could not take it as input video format directly.
For example, with my DP TV I would found "RGB444 & YCRCB422 & & YCRCB444"
support in drm_display_info.color_formats and 16bit bpc support, but
RK3288 crtc
driver could only output RGB & ITU formats, so finally
analogix_dp-rockchip driver
config crtc to RGBaaa 10bpc mode.
In this sutiation, the analogix_dp core driver would pazzled by the
drm_display_info,
can't chose the right color_space and bpc.
And this is the place that confused me, wish you could give some ideas
about this one :-)
-------------------------------------------------------------------------------------------------
Besides, The dynamic_range and ycbcr_coeff haven't been record in
drm_display_info, but
I though we can parse it by the video code.
The dynamic_range would have two values "CEA range" and "VESA range", so
I though if
the currect mode have a no-zero vic (drm_match_cea_mode()) then config
it to "CEA range",
otherwhise config it to "VESA range".
YCbCr Coefficients would have two values "ITU709" and "ITU601". I see
dw_hdmi driver have
been set the colorimetry to ITU_601 when vic is 6/7/21/22/2/3/17/18, I
thouht we can stole this
to analogix_dp driver.
/* dynamic_range & colorimetry */
vic = drm_match_cea_mode(mode);
if ((vic == 6) || (vic == 7) || (vic == 21) || (vic == 22) ||
(vic == 2) || (vic == 3) || (vic == 17) || (vic == 18)) {
video_info->dynamic_range = CEA;
video_info->ycbcr_coeff = COLOR_YCBCR601;
} else if (vic) {
video_info->dynamic_range = CEA;
video_info->ycbcr_coeff = COLOR_YCBCR709;
} else {
video_info->dynamic_range = VESA;
video_info->ycbcr_coeff = COLOR_YCBCR709;
}
I'm not sure whether this is right, also wish you could give some
suggests ;)
>> samsung,link-rate = <0x0a>;
>> samsung,lane-count = <1>;
> And these should really be derived from values in the DPCD and adjusted
> (if necessary) during link training.
>
> Why would you ever want to hard-code the above?
>
And I though we should keep those DT properties now. I try to remove
those DT
property, so analogix dp driver would always use the max link_rate and
lane_count
which read from dpcd. For my 2K DP TV, link rate would reach to 5.4Gbps,
lane cout
would reach 4 lances, if so analogix dp driver could not light my DP TV
up any more.
After that I found that RK3288 eDP TRM have indicated some limites about
those
that RK3288 only support 4 physical lanes of 2.7/1.62 Gbps/lane, which
means 5.4Gbps
link rate is too high for RK3288.
So I think we could treate them as hardware max values, is it okay?
Thanks,
- Yakir
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next prev parent reply other threads:[~2015-08-19 10:23 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-07 10:34 [PATCH v2 0/8] Add Analogix Core Display Port Driver Yakir Yang
2015-08-07 10:37 ` [PATCH v2 1/8] drm: exynos/dp: fix code style Yakir Yang
2015-08-07 10:40 ` [PATCH v2 2/8] drm: exynos/dp: convert to drm bridge mode Yakir Yang
2015-08-07 10:46 ` [PATCH v2 4/8] drm: rockchip/dp: add rockchip platform dp driver Yakir Yang
[not found] ` <1438944380-18897-1-git-send-email-ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-08-07 22:46 ` Heiko Stübner
2015-08-08 3:54 ` Yakir Yang
2015-08-10 10:00 ` Thierry Reding
2015-08-10 12:59 ` Yakir Yang
2015-08-10 13:17 ` Thierry Reding
2015-08-10 16:23 ` Yakir Yang
2015-08-19 10:23 ` Yakir Yang [this message]
2015-08-10 12:08 ` Heiko Stübner
2015-08-10 13:15 ` Yakir Yang
[not found] ` <1438943674-18191-1-git-send-email-ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-08-07 10:43 ` [PATCH v2 3/8] drm: bridge: analogix_dp: split exynos dp driver to bridge dir Yakir Yang
2015-08-07 10:46 ` [PATCH v2 5/8] drm: bridge/analogix_dp: add platform device type support Yakir Yang
2015-08-07 10:49 ` [PATCH v2 6/8] drm: bridge: analogix_dp: add some rk3288 special registers setting Yakir Yang
2015-08-07 10:51 ` [PATCH v2 7/8] drm: bridge: analogix_dp: try force hpd after plug in lookup failed Yakir Yang
2015-08-07 10:54 ` [PATCH v2 8/8] drm: bridge/analogix_dp: expand the delay time for hpd detect Yakir Yang
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